Lukáš Kekely

Publikace

• 2021

  FUKAČ Tomáš, MATOUŠEK Jiří, KOŘENEK Jan a KEKELY Lukáš. Increasing Memory Efficiency of Hash-Based Pattern Matching for High-Speed Networks. In: 2021 International Conference on Field-Programmable Technology, ICFPT 2021. Auckland: Institute of Electrical and Electronics Engineers, 2021, s. 185-193. ISBN 978-1-6654-2010-5.
  Detail

• 2020

  KOŘENEK Jan, KORČEK Pavol a KEKELY Lukáš. Akcelerace analýzy síťového provozu. DSM Data Security Management, roč. 24, č. 4, 2020, s. 30-34. ISSN 1211-8737.
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  KEKELY Michal, KEKELY Lukáš a KOŘENEK Jan. General memory efficient packet matching FPGA architecture for future high-speed networks. Microprocessors and Microsystems, roč. 73, č. 3, 2020, s. 1-12. ISSN 0141-9331.
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  KEKELY Lukáš, CABAL Jakub, PUŠ Viktor a KOŘENEK Jan. Multi Buses: Theory and Practical Considerations of Data Bus Width Scaling in FPGAs. In: Proceedings - Euromicro Conference on Digital System Design, DSD 2020. Kranj: IEEE Computer Society, 2020, s. 49-56. ISBN 978-1-7281-9535-3.
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• 2019

  KEKELY Lukáš, CABAL Jakub a KOŘENEK Jan. Effective FPGA Architecture for General CRC. In: Architecture of Computing Systems - ARCS 2019. Neuvedeno: Springer International Publishing, 2019, s. 211-223. ISBN 978-3-030-18655-5.
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  KUČERA Jan, KEKELY Lukáš, PIECEK Adam a KOŘENEK Jan. General IDS Acceleration for High-Speed Networks. In: Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018. Orlando: Institute of Electrical and Electronics Engineers, 2019, s. 366-373. ISBN 978-1-5386-8477-1.
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• 2018

  CABAL Jakub, BENÁČEK Pavel, KEKELY Lukáš, KEKELY Michal, PUŠ Viktor a KOŘENEK Jan. Configurable FPGA Packet Parser for Terabit Networks with Guaranteed Wire-Speed Throughput. In: Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. New York: Association for Computing Machinery, 2018, s. 249-258. ISBN 978-1-4503-5614-5.
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  KUČERA Jan, KEKELY Lukáš, PUŠ Viktor, PIECEK Adam a KOŘENEK Jan. Hardware Acceleration of Intrusion Detection Systems for High-Speed Networks. In: Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems. Ithaca, NY: Association for Computing Machinery, 2018, s. 177-178. ISBN 978-1-4503-5902-3.
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  KEKELY Lukáš, CABAL Jakub a KOŘENEK Jan. High-Speed Computation of CRC Codes for FPGAs. In: Proceedings of the 2018 International Conference on Field-Programmable Technology (FPT 2018). Naha: IEEE Computer Society, 2018, s. 237-240. ISBN 978-1-7281-0214-6.
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  KEKELY Michal, KEKELY Lukáš a KOŘENEK Jan. Memory Aware Packet Matching Architecture for High-Speed Networks. In: Proceedings of the 21st Euromicro Conference on Digital Systems Design. Praha: IEEE Computer Society, 2018, s. 1-8. ISBN 978-1-5386-7376-8.
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• 2015

  ŽÁDNÍK Martin, KEKELY Lukáš, VRÁNA Roman, HOLKOVIČ Martin a FRANKOVÁ Barbora. Dokumentace pro sestavení a zprovoznění prototypu hardwarově akcelerované sondy pro legální odposlechy. Brno: Fakulta informačních technologií VUT v Brně, 2015.
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  KEKELY Lukáš, VRÁNA Roman a ŽÁDNÍK Martin. Report z testování prototypu 100Gb/s sondy pro zákonné odposlechy. FIT-TR-2015-001, Brno: Fakulta informačních technologií VUT v Brně, 2015.
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  KEKELY Lukáš, KUČERA Jan, PUŠ Viktor, KOŘENEK Jan a VASILAKOS Athanasios. Software Defined Monitoring of Application Protocols. IEEE Transactions on Computers, roč. 65, č. 2, 2015, s. 615-626. ISSN 0018-9340.
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• 2014

  ZÁVODNÍK Tomáš, KEKELY Lukáš a PUŠ Viktor. CRC based hashing in FPGA using DSP blocks. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warszawa: IEEE Computer Society, 2014, s. 179-182. ISBN 978-1-4799-4558-0.
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  PUŠ Viktor, KEKELY Lukáš a KOŘENEK Jan. Design Methodology of Configurable High Performance Packet Parser for FPGA. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warszawa: IEEE Computer Society, 2014, s. 189-194. ISBN 978-1-4799-4558-0.
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  KEKELY Lukáš, ŽÁDNÍK Martin, MATOUŠEK Jiří a KOŘENEK Jan. Fast Lookup for Dynamic Packet Filtering in FPGA. In: Proceedings of the 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2014. Warszawa: IEEE Computer Society, 2014, s. 219-222. ISBN 978-1-4799-4558-0.
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  KEKELY Lukáš, PUŠ Viktor a KOŘENEK Jan. Software Defined Monitoring of Application Protocols. In: Proceedings of IEEE INFOCOM 2014 - IEEE Conference on Computer Communications. Toronto: IEEE Computer Society, 2014, s. 1725-1733. ISBN 978-1-4799-3360-0.
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  KEKELY Lukáš. Software Defined Monitoring: Nový prístup k monitorovaniu vysokorýchlostných počítačových sietí. In: Počítačové architektury a diagnostika 2014. Liberec: Technická univerzita v Liberci, 2014, s. 74-79. ISBN 978-80-7494-027-9.
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  KEKELY Lukáš, PUŠ Viktor, BENÁČEK Pavel a KOŘENEK Jan. Trade-offs and Progressive Adoption of FPGA Acceleration in Network Traffic Monitoring. In: 2014 24th International Conference on Field Programmable Logic and Applications (FPL 2014). Munich: IEEE Circuits and Systems Society, 2014, s. 264-267. ISBN 978-3-00-044645-0.
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• 2012

  KEKELY Lukáš a ŽÁDNÍK Martin. Hardwarově akcelerovaná sonda pro legální odposlechy. FIT-TR-2012-005, Brno: Fakulta informačních technologií VUT v Brně, 2012.
  Detail

  KEKELY Lukáš, PUŠ Viktor a KOŘENEK Jan. Low-Latency Modular Packet Header Parser for FPGA. In: ACM/IEEE Symposium on Architectures for Networking and Communications Systems. Austin: Association for Computing Machinery, 2012, s. 77-78. ISBN 978-1-4503-1685-9.
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