Jiří Matoušek

Publications

• 2023

  KOŠAŘ Vlastimil, ŠIŠMIŠ Lukáš, MATOUŠEK Jiří and KOŘENEK Jan. Accelerating IDS Using TLS Pre-Filter in FPGA. In: Proceedings - IEEE Symposium on Computers and Communications. Tunis: IEEE Computer Society, 2023, pp. 436-442. ISBN 979-8-3503-0048-2.
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• 2022

  MATOUŠEK Jiří, LUČANSKÝ Adam, JANEČEK David, SABO Jozef, KOŘENEK Jan and ANTICHI Gianni. ClassBench-ng: Benchmarking Packet Classification Algorithms in the OpenFlow Era. IEEE/ACM Transactions on Networking, vol. 30, no. 5, 2022, pp. 1912-1925. ISSN 1558-2566.
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• 2021

  FUKAČ Tomáš, MATOUŠEK Jiří, KOŘENEK Jan and KEKELY Lukáš. Increasing Memory Efficiency of Hash-Based Pattern Matching for High-Speed Networks. In: 2021 International Conference on Field-Programmable Technology, ICFPT 2021. Auckland: Institute of Electrical and Electronics Engineers, 2021, pp. 185-193. ISBN 978-1-6654-2010-5.
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  FUKAČ Tomáš, KOŘENEK Jan and MATOUŠEK Jiří. Scalability of Hash-based Pattern Matching for High-speed Network Security and Monitoring. In: Proceedings - IEEE Symposium on Computers and Communications. Athens: Institute of Electrical and Electronics Engineers, 2021, pp. 1-6. ISBN 978-1-6654-2744-9.
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• 2020

  FUKAČ Tomáš, KOŠAŘ Vlastimil, KOŘENEK Jan and MATOUŠEK Jiří. Increasing Throughput of Intrusion Detection Systems by Hash-Based Short String Pre-Filter. In: Proceedings - Conference on Local Computer Networks, LCN. Sydney (virtual): Institute of Electrical and Electronics Engineers, 2020, pp. 509-514. ISBN 978-1-7281-7158-6.
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• 2019

  ČEŠKA Milan, HAVLENA Vojtěch, HOLÍK Lukáš, KOŘENEK Jan, LENGÁL Ondřej, MATOUŠEK Denis, MATOUŠEK Jiří, SEMRIČ Jakub and VOJNAR Tomáš. Deep Packet Inspection in FPGAs via Approximate Nondeterministic Automata. In: Proceedings - 27th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2019. San Diego, CA: Institute of Electrical and Electronics Engineers, 2019, pp. 109-117. ISBN 978-1-7281-1131-5.
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• 2018

  MATOUŠEK Denis, MATOUŠEK Jiří and KOŘENEK Jan. High-speed Regular Expression Matching with Pipelined Memory-based Automata. Proceedings - 26th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018. Boulder, CO: IEEE Computer Society, 2018. ISBN 978-1-5386-5522-1.
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  MATOUŠEK Denis, KUBIŠ Juraj, MATOUŠEK Jiří and KOŘENEK Jan. Regular Expression Matching with Pipelined Delayed Input DFAs for High-speed Networks. In: ANCS 2018 - Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems. Ithaca, NY: Association for Computing Machinery, 2018, pp. 104-110. ISBN 978-1-4503-5902-3.
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• 2017

  IŠA Radek and MATOUŠEK Jiří. A Novel Architecture for LZSS Compression of Configuration Bitstreams Within FPGA. In: Proceedings - 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuit and Systems, DDECS 2017. Dresden, 2017, pp. 171-176. ISBN 978-1-5386-0471-7.
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  MATOUŠEK Jiří, ANTICHI Gianni, LUČANSKÝ Adam, MOORE Andrew W. and KOŘENEK Jan. ClassBench-ng: Recasting ClassBench After a Decade of Network Evolution. In: Proceedings - 2017 ACM/IEEE Symposium on Architectures for Networking and Communications Systems, ANCS 2017. Beijing: IEEE Computer Society, 2017, pp. 204-216. ISBN 978-1-5090-6386-4.
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• 2014

  MATOUŠEK Jiří. Analýza dynamických vlastností směrovacích tabulek pro efektivnější implementaci směrování v páteřních sítích. In: Sborník příspěvků PAD-2014 - elektronická verze. Liberec: Liberec University of Technology, 2014, pp. 129-134. ISBN 978-80-7494-027-9.
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  KEKELY Lukáš, ŽÁDNÍK Martin, MATOUŠEK Jiří and KOŘENEK Jan. Fast Lookup for Dynamic Packet Filtering in FPGA. In: Proceedings of the 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2014. Warszawa: IEEE Computer Society, 2014, pp. 219-222. ISBN 978-1-4799-4558-0.
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• 2013

  MATOUŠEK Jiří, SKAČAN Martin and KOŘENEK Jan. Memory Efficient IP Lookup in 100 Gbps Networks. In: 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings. Porto: IEEE Circuits and Systems Society, 2013, pp. 1-8. ISBN 978-1-4799-0004-6.
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  MATOUŠEK Jiří. Paměťově efektivní vyhledání nejdelšího shodného prefixu pro směrování ve 100 Gb/s sítích. In: Počítačové architektury a diagnostika PAD 2013. Plzeň: University of West Bohemia in Pilsen, 2013, pp. 105-110. ISBN 978-80-261-0270-0.
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  MATOUŠEK Jiří, SKAČAN Martin and KOŘENEK Jan. Towards Hardware Architecture for Memory Efficient IPv4/IPv6 Lookup in 100 Gbps Networks. In: Proceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2013. Brno: IEEE Computer Society, 2013, pp. 108-111. ISBN 978-1-4673-6136-1.
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• 2012

  MATOUŠEK Jiří. Optimalizace vyhledání nejdelšího prefixu síťové adresy s využitím částečné dynamické rekonfigurace FPGA. In: Počítačové architektury a diagnostika. Milovy: Faculty of Information Technology, Czech Technical University, 2012, pp. 67-72. ISBN 978-80-01-05106-1.
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• 2011

  MATOUŠEK Jiří. FPGA-Based Packet Generator. In: Proceedings of the 17th Conference STUDENT EEICT 2011. Brno: Brno University of Technology, 2011, pp. 312-314. ISBN 978-80-214-4272-6.
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  MATOUŠEK Jiří and KORČEK Pavol. Precise IPv4/IPv6 Packet Generator Based on NetCOPE Platform. In: Proceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2011. Cottbus: IEEE Computer Society, 2011, pp. 319-324. ISBN 978-1-4244-9756-0.
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