prof. Ing.

Lukáš Sekanina

Ph.D.

Head of Department

+420 54114 1215
sekanina@fit.vut.cz
L322 Office
2913/BUT personal ID

Publications

  • 2024

    ARIF Muhammad, REHMAN (ur) Faizan, SEKANINA Lukáš and MALIK Aamir Saeed. A comprehensive survey of evolutionary algorithms and metaheuristics in brain EEG-based applications. Journal of Neural Engineering, vol. 21, no. 5, 2024, pp. 1-25. ISSN 1741-2552.
    Detail

    PIŇOS Michal, SEKANINA Lukáš and MRÁZEK Vojtěch. ApproxDARTS: Differentiable Neural Architecture Search with Approximate Multipliers. In: 2024 The International Joint Conference on Neural Networks (IJCNN). Yokohama: Institute of Electrical and Electronics Engineers, 2024, pp. 1-8. ISBN 979-8-3503-5931-2.
    Detail

    VAŠÍČEK Zdeněk, MRÁZEK Vojtěch and SEKANINA Lukáš. Automated Verifiability-Driven Design of Approximate Circuits: Exploiting Error Analysis. In: 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE). Valencia: Institute of Electrical and Electronics Engineers, 2024, pp. 1-6. ISBN 979-8-3503-4859-0.
    Detail

    KLHŮFEK Jan, ŠAFÁŘ Miroslav, MRÁZEK Vojtěch, VAŠÍČEK Zdeněk and SEKANINA Lukáš. Exploiting Quantization and Mapping Synergy in Hardware-Aware Deep Neural Network Accelerators. In: 2024 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS). Kielce: Institute of Electrical and Electronics Engineers, 2024, pp. 1-6. ISBN 979-8-3503-5934-3.
    Detail

    HUSA Jakub and SEKANINA Lukáš. Semantic Mutation Operator for Fast and Efficient Design of Bent Boolean Functions. Genetic Programming and Evolvable Machines, vol. 25, no. 3, 2024, pp. 1-32. ISSN 1389-2576.
    Detail

  • 2023

    PIŇOS Michal, MRÁZEK Vojtěch, VAVERKA Filip, VAŠÍČEK Zdeněk and SEKANINA Lukáš. Acceleration Techniques for Automated Design of Approximate Convolutional Neural Networks. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 13, no. 1, 2023, pp. 212-224. ISSN 2156-3357.
    Detail

    HURTA Martin, MRÁZEK Vojtěch, DRAHOŠOVÁ Michaela and SEKANINA Lukáš. ADEE-LID: Automated Design of Energy-Efficient Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers. In: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE). Antwerp: Institute of Electrical and Electronics Engineers, 2023, pp. 1-2. ISBN 978-3-9819263-7-8.
    Detail

    LOJDA Jakub, PÁNEK Richard, SEKANINA Lukáš and KOTÁSEK Zdeněk. Automated Design and Usage of the Fault-Tolerant Dynamic Partial Reconfiguration Controller for FPGAs. Microelectronics Reliability, vol. 2023, no. 144, pp. 1-16. ISSN 0026-2714.
    Detail

    SEDLÁČEK Marek and SEKANINA Lukáš. Evolution of Editing Scripts From Examples. In: Proceedings of the Genetic and Evolutionary Computation Conference Companion (GECCO '23). Lisbon: Association for Computing Machinery, 2023, pp. 803-806. ISBN 979-8-4007-0120-7.
    Detail

    JŮZA Tadeáš and SEKANINA Lukáš. GPAM: Genetic Programming with Associative Memory. In: 26th European Conference on Genetic Programming (EuroGP) Held as Part of EvoStar. LNCS, vol. 13986. Cham: Springer Nature Switzerland AG, 2023, pp. 68-83. ISBN 978-3-031-29572-0. ISSN 0302-9743.
    Detail

    SEKANINA Lukáš, MRÁZEK Vojtěch and PIŇOS Michal. Hardware-Aware Evolutionary Approaches to Deep Neural Networks. Handbook of Evolutionary Machine Learning. Genetic and Evolutionary Computation. Singapore: Springer Nature Singapore, 2023, pp. 367-396. ISBN 978-981-9938-13-1.
    Detail

    HURTA Martin, MRÁZEK Vojtěch, DRAHOŠOVÁ Michaela and SEKANINA Lukáš. MODEE-LID: Multiobjective Design of Energy-Efficient Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers. In: 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). Tallinn: Institute of Electrical and Electronics Engineers, 2023, pp. 155-160. ISBN 979-8-3503-3277-3.
    Detail

    HURTA Martin, MRÁZEK Vojtěch, DRAHOŠOVÁ Michaela and SEKANINA Lukáš. Multi-objective Design of Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers. Evo* 2023 -- Late-Breaking Abstracts Volume. Brno, 2023.
    Detail

    PIŇOS Michal, MRÁZEK Vojtěch and SEKANINA Lukáš. Prediction of Inference Energy on CNN Accelerators Supporting Approximate Circuits. In: 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Talinn: Institute of Electrical and Electronics Engineers, 2023, pp. 45-50. ISBN 979-8-3503-3277-3.
    Detail

    HUSA Jakub and SEKANINA Lukáš. Semantic Mutation Operator for Fast and Efficient Design of Bent Boolean Functions. Evo* 2023 -- Late-Breaking Abstracts Volume. Brno, 2023.
    Detail

    HURTA Martin, SCHWARZEROVÁ Jana, PROVAZNÍK Valentine, WECKWERTH Wolfram, WALTHER Dirk and SEKANINA Lukáš. Utilizing Cartesian Genetic Programming for Efficient Polygenic Risk Score Calculation in Plants. Program and Abstract Book: Swedish Bioinformatics Workshop 2023. Stockholm, 2023.
    Detail

    NAGELE Thomas, WECKWERTH Wolfram, HURTA Martin, SCHWARZEROVÁ Jana, SEKANINA Lukáš and PROVAZNÍK Valentine. Utilizing Genetic Programming to Enhance Polygenic Risk Score Calculation. In: 2023 IEEE International Conference on Bioinformatics and Biomedicine (BIBM 2023). Istanbul: Institute of Electrical and Electronics Engineers, 2023, pp. 3782-3787. ISBN 979-8-3503-3748-8.
    Detail

    PRABAKARAN Bharath S., MRÁZEK Vojtěch, VAŠÍČEK Zdeněk, SEKANINA Lukáš and SHAFIQUE Muhammad. Xel-FPGAs: An End-to-End Automated Exploration Framework for Approximate Accelerators in FPGA-Based Systems. In: 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD). San Francisco: Institute of Electrical and Electronics Engineers, 2023, pp. 1-9. ISBN 979-8-3503-1559-2.
    Detail

  • 2022

    BOSIO Alberto, DI Carlo Stefano, GIRARD Patrick, RUOSPO Annachiara, SANCHEZ Ernesto, SAVINO Aessandro, SEKANINA Lukáš, TRAIOLA Marcello, VAŠÍČEK Zdeněk and VIRAZEL Arnaud. Design, Verification, Test, and In-Field Implications of Approximate Digital Integrated Circuits. Approximate Computing Techniques. Cham: Springer International Publishing, 2022, pp. 349-385. ISBN 978-3-030-94704-0.
    Detail

    PIŇOS Michal, MRÁZEK Vojtěch and SEKANINA Lukáš. Evolutionary Approximation and Neural Architecture Search. Genetic Programming and Evolvable Machines, vol. 23, no. 3, 2022, pp. 351-374. ISSN 1389-2576.
    Detail

    VÁLEK Matěj and SEKANINA Lukáš. Evolutionary Approximation in Non-Local Means Image Filters. In: 2022 IEEE International Conference on Systems, Man, and Cybernetics (SMC). Praha: Institute of Electrical and Electronics Engineers, 2022, pp. 2759-2766. ISBN 978-1-6654-5258-8.
    Detail

    HURTA Martin, DRAHOŠOVÁ Michaela, SEKANINA Lukáš, SMITH Stephen L. and ALTY Jane E. Evolutionary Design of Reduced Precision Levodopa-Induced Dyskinesia Classifiers. In: Genetic Programming, 25th European Conference, EuroGP 2022. Lecture Notes in Computer Science, vol. 13223. Madrid: Springer Nature Switzerland AG, 2022, pp. 85-101. ISBN 978-3-031-02055-1.
    Detail

    SEKANINA Lukáš, VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Inexact Arithmetic Operators. Approximate Computing Techniques. Cham: Springer International Publishing, 2022, pp. 81-107. ISBN 978-3-030-94704-0.
    Detail

    ČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk and VOJNAR Tomáš. SagTree: Towards Efficient Mutation in Evolutionary Circuit Approximation. Swarm and Evolutionary Computation, vol. 69, no. 100986, 2022, pp. 1-10. ISSN 2210-6502.
    Detail

  • 2021

    SHAFIQUE Muhammad, STEININGER Andreas, SEKANINA Lukáš, KRSTIĆ Miloš, STOJANOVIC Goran and MRÁZEK Vojtěch, ed. 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. USA: Institute of Electrical and Electronics Engineers, 2021. ISBN 978-1-6654-3595-6.
    Detail

    BARBARESCHI Mario, BOSIO Alberto, SEKANINA Lukáš and BRAUN Claus. Editorial: Special issue on Advancing on Approximate Computing: Methodologies, Architectures and Algorithms. Future Generation Computer Systems, vol. 124, no. 1, 2021. ISSN 0167-739X.
    Detail

    SEKANINA Lukáš. Evolutionary Algorithms in Approximate Computing: A Survey. Journal of Integrated Circuits and Systems, vol. 16, no. 2, 2021, pp. 1-12. ISSN 1872-0234.
    Detail

    PIŇOS Michal, MRÁZEK Vojtěch and SEKANINA Lukáš. Evolutionary Neural Architecture Search Supporting Approximate Multipliers. In: Genetic Programming, 24th European Conference, EuroGP 2021. Lecture Notes in Computer Science, vol 12691, vol. 12691. Seville: Springer Nature Switzerland AG, 2021, pp. 82-97. ISBN 978-3-030-72812-0.
    Detail

    SEKANINA Lukáš. Neural Architecture Search and Hardware Accelerator Co-Search: A Survey. IEEE Access, vol. 9, no. 9, 2021, pp. 151337-151362. ISSN 2169-3536.
    Detail

  • 2020

    ČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk and VOJNAR Tomáš. Adaptive verifiability-driven strategy for evolutionary approximation of arithmetic circuits. Applied Soft Computing, vol. 95, no. 106466, 2020, pp. 1-17. ISSN 1568-4946.
    Detail

    PRABAKARAN Bharath S., MRÁZEK Vojtěch, VAŠÍČEK Zdeněk, SEKANINA Lukáš and SHAFIQUE Muhammad. ApproxFPGAs: Embracing ASIC-based Approximate Arithmetic Components for FPGA-Based Systems. In: 2020 57th ACM/IEEE Design Automation Conference (DAC). San Francisco: Institute of Electrical and Electronics Engineers, 2020, pp. 1-6. ISBN 978-1-4503-6725-7.
    Detail

    BOSIO Alberto, DI Carlo Stefano, GIRARD Patrick, SANCHEZ Ernesto, SAVINO Aessandro, SEKANINA Lukáš, TRAIOLA Marcello, VAŠÍČEK Zdeněk and VIRAZEL Arnaud. Design, Verification, Test and In-Field Implications of Approximate Computing Systems. In: 25th IEEE European Test Symposium. Los Alamitos: Institute of Electrical and Electronics Engineers, 2020, pp. 1-10. ISBN 978-1-7281-4312-5.
    Detail

    GROCHOL David and SEKANINA Lukáš. Evolutionary Design of Hash Functions for IPv6 Network Flow Hashing. In: IEEE Congress on Evolutionary Computation. Los Alamitos: IEEE Computational Intelligence Society, 2020, pp. 1-8. ISBN 978-1-7281-6929-3.
    Detail

    HUSA Jakub and SEKANINA Lukáš. Evolving Cryptographic Boolean Functions with Minimal Multiplicative Complexity. In: 2020 IEEE Congress on Evolutionary Computation (CEC). Los Alamitos: IEEE Computational Intelligence Society, 2020, pp. 1-8. ISBN 978-1-7281-6929-3.
    Detail

    ANSARI Mohammad S., MRÁZEK Vojtěch, COCKBURN Bruce F., SEKANINA Lukáš, VAŠÍČEK Zdeněk and HAN Jie. Improving the Accuracy and Hardware Efficiency of Neural Networks Using Approximate Multipliers. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 2, 2020, pp. 317-328. ISSN 1063-8210.
    Detail

    MRÁZEK Vojtěch, SEKANINA Lukáš and VAŠÍČEK Zdeněk. Libraries of Approximate Circuits: Automated Design and Application in CNN Accelerators. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 10, no. 4, 2020, pp. 406-418. ISSN 2156-3357.
    Detail

    HU Ting, NICOLAU Miguel and SEKANINA Lukáš. Special issue on highlights of genetic programming 2019 events. Genetic Programming and Evolvable Machines, vol. 21, no. 3, 2020. ISSN 1389-2576.
    Detail

    VAVERKA Filip, MRÁZEK Vojtěch, VAŠÍČEK Zdeněk and SEKANINA Lukáš. TFApprox: Towards a Fast Emulation of DNN Approximate Hardware Accelerators on GPU. In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE). Grenoble: Institute of Electrical and Electronics Engineers, 2020, pp. 294-297. ISBN 978-3-9819263-4-7.
    Detail

    MRÁZEK Vojtěch, SEKANINA Lukáš and VAŠÍČEK Zdeněk. Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks. In: 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems. Genoa: Institute of Electrical and Electronics Engineers, 2020, pp. 243-247. ISBN 978-1-7281-4922-6.
    Detail

  • 2019

    DRAHOŠOVÁ Michaela, SEKANINA Lukáš and WIGLASZ Michal. Adaptive Fitness Predictors in Coevolutionary Cartesian Genetic Programming. Evolutionary Computation, vol. 27, no. 3, 2019, pp. 497-523. ISSN 1063-6560.
    Detail

    MRÁZEK Vojtěch, VAŠÍČEK Zdeněk, SEKANINA Lukáš, HANIF Muhammad A. and SHAFIQUE Muhammad. ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining. In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. Denver: Institute of Electrical and Electronics Engineers, 2019, pp. 1-8. ISBN 978-1-7281-2350-9.
    Detail

    MRÁZEK Vojtěch, HANIF Muhammad A., VAŠÍČEK Zdeněk, SEKANINA Lukáš and SHAFIQUE Muhammad. autoAx: An Automatic Design Space Exploration and Circuit Building Methodology utilizing Libraries of Approximate Components. In: The 56th Annual Design Automation Conference 2019 (DAC '19). Las Vegas: Association for Computing Machinery, 2019, pp. 1-6. ISBN 978-1-4503-6725-7.
    Detail

    VAŠÍČEK Zdeněk, MRÁZEK Vojtěch and SEKANINA Lukáš. Automated Circuit Approximation Method Driven by Data Distribution. In: Design, Automation and Test in Europe Conference. Florence: European Design and Automation Association, 2019, pp. 96-101. ISBN 978-3-9819263-2-3.
    Detail

    SEKANINA Lukáš, VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Automated Search-Based Functional Approximation for Digital Circuits. Approximate Circuits - Methodologies and CAD. Heidelberg: Springer International Publishing, 2019, pp. 175-203. ISBN 978-3-319-99322-5.
    Detail

    KONČAL Ondřej and SEKANINA Lukáš. Cartesian Genetic Programming as an Optimizer of Programs Evolved with Geometric Semantic Genetic Programming. In: Genetic Programming 22nd European Conference, EuroGP 2019. Cham: Springer International Publishing, 2019, pp. 98-113. ISBN 978-3-030-16669-4.
    Detail

    MRÁZEK Vojtěch, SEKANINA Lukáš, DOBAI Roland, SÝS Marek and ŠVENDA Petr. Efficient On-Chip Randomness Testing Utilizing Machine Learning Techniques. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 12, 2019, pp. 2734-2744. ISSN 1063-8210.
    Detail

    SEKANINA Lukáš, HU Ting, LOURENÇO Nuno, RICHTER Hendrik and GARCÍA-SÁNCHEZ Pablo, ed. Genetic Programming 22nd European Conference. Lecture Notes in Computer Science, vol. 11451. Cham: Springer International Publishing, 2019. ISBN 978-3-030-16669-4.
    Detail

    STAMENKOVIC Zoran, BOSIO Alberto, CSEREY Gyorgy, NOVÁK Ondřej, PLESKACZ Witold, SEKANINA Lukáš, STEININGER Andreas, STOJANOVIC Goran and STOPJAKOVÁ Viera. International Symposium on Design and Diagnostics of Electronic Circuits and Systems. In: 2019 IEEE International Test Conference. Washington, DC: Institute of Electrical and Electronics Engineers, 2019, pp. 1-4. ISBN 978-1-7281-4823-6.
    Detail

    BADÁŇ Filip and SEKANINA Lukáš. Optimizing Convolutional Neural Networks for Embedded Systems By Means of Neuroevolution. In: Theory and Practice of Natural Computing. LNCS 11934. Cham: Springer International Publishing, 2019, pp. 109-121. ISBN 978-3-030-34499-3.
    Detail

    REK Petr and SEKANINA Lukáš. TypeCNN: CNN Development Framework With Flexible Data Types. In: Design, Automation and Test in Europe Conference. Florence: European Design and Automation Association, 2019, pp. 292-295. ISBN 978-3-9819263-2-3.
    Detail

  • 2018

    CASTELLI Mauro, SEKANINA Lukáš, ZHANG Mengjie, CAGNONI Stefano and GARCÍA-SÁNCHEZ Pablo, ed. 21st European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 10781. Berlin: Springer International Publishing, 2018. ISBN 978-3-319-77552-4.
    Detail

    ČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk and VOJNAR Tomáš. ADAC: Automated Design of Approximate Circuits. In: Proceedings of 30th International Conference on Computer Aided Verification (CAV'18). Oxford, UK: Springer International Publishing, 2018, pp. 612-620. ISBN 978-3-319-96145-3.
    Detail

    SEKANINA Lukáš. Approximate Computing: An Old Job for Cartesian Genetic Programming?. Inspired by Nature. Emergence, Complexity and Computation, Vol. 28. Cham: Springer International Publishing, 2018, pp. 195-212. ISBN 978-3-319-67996-9.
    Detail

    WIGLASZ Michal and SEKANINA Lukáš. Cooperative Coevolutionary Approximation in HOG-based Human Detection Embedded System. In: 2018 IEEE Symposium Series on Computational Intelligence (SSCI 2018). Bengaluru: Institute of Electrical and Electronics Engineers, 2018, pp. 1313-1320. ISBN 978-1-5386-9276-9.
    Detail

    MRÁZEK Vojtěch, VAŠÍČEK Zdeněk and SEKANINA Lukáš. Design of Quality-Configurable Approximate Multipliers Suitable for Dynamic Environment. In: Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems. Edinburgh: Institute of Electrical and Electronics Engineers, 2018, pp. 264-271. ISBN 978-1-5386-7753-7.
    Detail

    SEKANINA Lukáš, MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Design Space Exploration for Approximate Implementations of Arithmetic Data Path Primitives. In: 25th IEEE International Conference on Electronics Circuits and Systems (ICECS). Bordeaux: IEEE Circuits and Systems Society, 2018, pp. 377-380. ISBN 978-1-5386-9562-3.
    Detail

    MRÁZEK Vojtěch, SÝS Marek, VAŠÍČEK Zdeněk, SEKANINA Lukáš and MATYÁŠ Václav. Evolving Boolean Functions for Fast and Efficient Randomness Testing. In: Proceedings of the Genetic and Evolutionary Computation Conference (GECCO '18). Kyoto: Association for Computing Machinery, 2018, pp. 1302-1309. ISBN 978-1-4503-5618-3.
    Detail

    GROCHOL David and SEKANINA Lukáš. Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs. In: Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems. Edinburgh: Institute of Electrical and Electronics Engineers, 2018, pp. 257-263. ISBN 978-1-5386-7753-7.
    Detail

    TREFZER Martin A. and SEKANINA Lukáš. Guest Editorial: Bio-inspired Hardware and Evolvable Systems. IET Computers & Digital Techniques, vol. 12, no. 4, 2018. ISSN 1751-8601.
    Detail

    GROCHOL David and SEKANINA Lukáš. Multi-Objective Evolution of Ultra-Fast General-Purpose Hash Functions. In: European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 10781. Berlin: Springer International Publishing, 2018, pp. 187-202. ISBN 978-3-319-77553-1.
    Detail

    MRÁZEK Vojtěch, VAŠÍČEK Zdeněk, SEKANINA Lukáš, JIANG Honglan and HAN Jie. Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 11, 2018, pp. 2572-2576. ISSN 1063-8210.
    Detail

    SEKANINA Lukáš, VAŠÍČEK Zdeněk, BOSIO Alberto, TRAIOLA Marcello, RECH Paolo, OLIVEIRA Daniel, FERNANDES Fernando and DI Carlo Stefano. Special Session: How Approximate Computing impacts Verification, Test and Reliability. 2018 IEEE 36th VLSI Test Symposium. San Francisco: IEEE Computer Society, 2018. ISBN 978-1-5386-3774-6.
    Detail

  • 2017

    MCDERMOTT James, CASTELLI Mauro, SEKANINA Lukáš, HAASDIJK Evert and GARCÍA-SÁNCHEZ Pablo, ed. 20th European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 10196. Berlin: Springer International Publishing, 2017. ISBN 978-3-319-55696-3.
    Detail

    SHAFIQUE Muhammad, HAFIZ Rehan, JAVED Muhammad Usama, ABBAS Sarmad, SEKANINA Lukáš, VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap. In: 2017 IEEE Computer Society Annual Symposium on VLSI. Los Alamitos: IEEE Computer Society Press, 2017, pp. 627-632. ISBN 978-1-5090-6762-6.
    Detail

    SEKANINA Lukáš, VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Approximate Circuits in Low-Power Image and Video Processing: The Approximate Median Filter. Radioengineering, vol. 26, no. 3, 2017, pp. 623-632. ISSN 1210-2512.
    Detail

    ČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk and VOJNAR Tomáš. Approximating Complex Arithmetic Circuits with Formal Error Guarantees: 32-bit Multipliers Accomplished. In: Proceedings of 36th IEEE/ACM International Conference On Computer Aided Design (ICCAD). Irvine, CA: Institute of Electrical and Electronics Engineers, 2017, pp. 416-423. ISBN 978-1-5386-3093-8.
    Detail

    GROCHOL David and SEKANINA Lukáš. Comparison of Parallel Linear Genetic Programming Implementations. In: Recent Advances in Soft Computing: Proceedings of the 22nd International Conference on Soft Computing (MENDEL 2016) held in Brno, Czech Republic, at June 8-10, 2016. Cham: Springer International Publishing, 2017, pp. 64-76. ISBN 978-3-319-58088-3.
    Detail

    MRÁZEK Vojtěch, HRBÁČEK Radek, VAŠÍČEK Zdeněk and SEKANINA Lukáš. EvoApprox8b: Library of Approximate Adders and Multipliers for Circuit Design and Benchmarking of Approximation Methods. In: Proc. of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lausanne: European Design and Automation Association, 2017, pp. 258-261. ISBN 978-3-9815370-9-3.
    Detail

    WIGLASZ Michal and SEKANINA Lukáš. Evolutionary Approximation of Gradient Orientation Module in HOG-based Human Detection System. In: 2017 IEEE Global Conference on Signal and Information Processing GlobalSIP 2017. Montreal: IEEE Signal Processing Society, 2017, pp. 1300-1304. ISBN 978-1-5090-5989-8.
    Detail

    DOBAI Roland, KOŘENEK Jan and SEKANINA Lukáš. Evolutionary design of hash function pairs for network filters. Applied Soft Computing, vol. 56, no. 7, 2017, pp. 173-181. ISSN 1568-4946.
    Detail

    KEŠNER Filip, SEKANINA Lukáš and BRÁZDIL Milan. Modular Framework for Detection of Inter-ictal Spikes in iEEG. In: The 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC'17). Los Alamos: Institute of Electrical and Electronics Engineers, 2017, pp. 418-421. ISBN 978-1-5090-2809-2.
    Detail

    GROCHOL David and SEKANINA Lukáš. Multiobjective Evolution of Hash Functions for High Speed Networks. In: Proceedings of the 2017 IEEE Congress on Evolutionary Computation. San Sebastian: IEEE Computer Society, 2017, pp. 1533-1540. ISBN 978-1-5090-4600-3.
    Detail

    MINAŘÍK Miloš and SEKANINA Lukáš. On Evolutionary Approximation of Sigmoid Function for HW/SW Embedded Systems. In: 20th European Conference on Genetic Programming, EuroGP 2017. Lecture Notes in Computer Science, vol. 10196. Berlin: Springer International Publishing, 2017, pp. 343-358. ISBN 978-3-319-55696-3.
    Detail

    VAŠÍČEK Zdeněk, MRÁZEK Vojtěch and SEKANINA Lukáš. Towards Low Power Approximate DCT Architecture for HEVC Standard. In: Proc. of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lausanne: European Design and Automation Association, 2017, pp. 1576-1581. ISBN 978-3-9815370-9-3.
    Detail

  • 2016

    DOBAI Roland, KOŘENEK Jan and SEKANINA Lukáš. Adaptive Development of Hash Functions in FPGA-Based Network Routers. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: IEEE Computational Intelligence Society, 2016, pp. 1-8. ISBN 978-1-5090-4240-1.
    Detail

    MRÁZEK Vojtěch, SARWAR Syed Shakib, SEKANINA Lukáš, VAŠÍČEK Zdeněk and ROY Kaushik. Design of Power-Efficient Approximate Multipliers for Approximate Artificial Neural Networks. In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. Austin, TX: Association for Computing Machinery, 2016, pp. 811-817. ISBN 978-1-4503-4466-1.
    Detail

    SÁNCHEZ-CLEMENTE Antonio José, ENTRENA Luis, HRBÁČEK Radek and SEKANINA Lukáš. Error Mitigation using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches. IEEE Transactions on Reliability, vol. 65, no. 4, 2016, pp. 1871-1883. ISSN 0018-9529.
    Detail

    DVOŘÁČEK Petr and SEKANINA Lukáš. Evolutionary Approximation of Edge Detection Circuits. In: 19th European Conference on Genetic programming. Lecture Notes in Computer Science, vol. 9594. Berlin: Springer International Publishing, 2016, pp. 19-34. ISBN 978-3-319-30667-4.
    Detail

    GROCHOL David, SEKANINA Lukáš, KOŘENEK Jan, ŽÁDNÍK Martin and KOŠAŘ Vlastimil. Evolutionary Circuit Design for Fast FPGA-Based Classification of Network Application Protocols. Applied Soft Computing, vol. 38, no. 1, 2016, pp. 933-941. ISSN 1568-4946.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Design of Complex Approximate Combinational Circuits. Genetic Programming and Evolvable Machines, vol. 17, no. 2, 2016, pp. 169-192. ISSN 1389-2576.
    Detail

    GROCHOL David and SEKANINA Lukáš. Evolutionary Design of Fast High-quality Hash Functions for Network Applications. In: GECCO '16 Proceedings of the 2016 on Genetic and Evolutionary Computation Conference. New York, NY: Association for Computing Machinery, 2016, pp. 901-908. ISBN 978-1-4503-4206-3.
    Detail

    VAŠÍČEK Zdeněk, MRÁZEK Vojtěch and SEKANINA Lukáš. Evolutionary Functional Approximation of Circuits Implemented into FPGAs. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: Institute of Electrical and Electronics Engineers, 2016, pp. 1-8. ISBN 978-1-5090-4240-1.
    Detail

    VAVERKA Filip, HRBÁČEK Radek and SEKANINA Lukáš. Evolving Component Library for Approximate High Level Synthesis. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: IEEE Computational Intelligence Society, 2016, pp. 1-8. ISBN 978-1-5090-4240-1.
    Detail

    SEKANINA Lukáš and VAŠÍČEK Zdeněk. Genetic Improvement for Approximate Computing. In: 2nd Workshop on Approximate Computing (WAPCO 2016). Prague, 2016, pp. 1-2.
    Detail

    SEKANINA Lukáš. Introduction to Approximate Computing: Embedded Tutorial. In: 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Košice: Institute of Electrical and Electronics Engineers, 2016, pp. 90-95. ISBN 978-1-5090-2467-4.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Search-based synthesis of approximate circuits implemented into FPGAs. In: 26th International Conference on Field Programmable Logic and Applications. Lausanne: Institute of Electrical and Electronics Engineers, 2016, pp. 1-4. ISBN 978-2-8399-1844-2.
    Detail

    HOLÍK Lukáš, LENGÁL Ondřej, ROGALEWICZ Adam, SEKANINA Lukáš, VAŠÍČEK Zdeněk and VOJNAR Tomáš. Towards Formal Relaxed Equivalence Checking in Approximate Computing Methodology. In: 2nd Workshop on Approximate Computing (WAPCO 2016). Prague, 2016, pp. 1-6.
    Detail

    SEKANINA Lukáš and KAPUSTA Vlastimil. Visualisation and Analysis of Genetic Records Produced by Cartesian Genetic Programming. In: GECCO'16 Companion. New York: Association for Computing Machinery, 2016, pp. 1411-1418. ISBN 978-1-4503-4323-7.
    Detail

  • 2015

    GROCHOL David, SEKANINA Lukáš, ŽÁDNÍK Martin and KOŘENEK Jan. A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP. In: Applications of Evolutionary Computation, 18th European Conference. Lecture Notes in Computer Science, vol. 9028. Berlin: Springer International Publishing, 2015, pp. 67-78. ISBN 978-3-319-16548-6.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Circuit Approximation Using Single- and Multi-Objective Cartesian GP. In: Genetic Programming. Lecture Notes in Computer Science, vol. 9025. Berlin: Springer International Publishing, 2015, pp. 217-229. ISBN 978-3-319-16500-4.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Approach to Approximate Digital Circuits Design. IEEE Transactions on Evolutionary Computation, vol. 19, no. 3, 2015, pp. 432-444. ISSN 1089-778X.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary approximation of complex digital circuits. In: Proceedings of the Companion Publication of the 2015 on Genetic and Evolutionary Computation Conference. New York: Association for Computing Machinery, 2015, pp. 1505-1506. ISBN 978-1-4503-3488-4.
    Detail

    MRÁZEK Vojtěch, VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Approximation of Software for Embedded Systems: Median Function. In: GECCO Companion '15 Proceedings of the Companion Publication of the 2015 on Genetic and Evolutionary Computation Conference. ACM. New York: Association for Computing Machinery, 2015, pp. 795-801. ISBN 978-1-4503-3488-4.
    Detail

    SEKANINA Lukáš and VAŠÍČEK Zdeněk. Evolutionary Computing in Approximate Circuit Design and Optimization. In: 1st Workshop on Approximate Computing (WAPCO 2015). Amsterdam, 2015, pp. 1-6.
    Detail

    KEŠNER Filip, CIMBÁLNÍK Jan, DOLEŽALOVÁ Irena, BRÁZDIL Milan and SEKANINA Lukáš. Fast Automated Interictal Spike Detection in iEEG/ECoG Recordings. In: Proceedings of NEUROTECHNIX: International Congress on Neurotechnology, Electronics and Informatics. Lisabon, 2015, pp. 1-4.
    Detail

    SEKANINA Lukáš and VAŠÍČEK Zdeněk. Functional Equivalence Checking for Evolution of Complex Digital Circuits. Evolvable Hardware - From Practice to Application. Berlin: Springer Verlag, 2015, pp. 175-189. ISBN 978-3-662-44615-7.
    Detail

    DRAHOŠOVÁ Michaela, HULVA Jiří and SEKANINA Lukáš. Indirectly Encoded Fitness Predictors Coevolved with Cartesian Programs. In: Genetic Programming. Lecture Notes in Computer Science, vol. 9025. Berlin: Springer International Publishing, 2015, pp. 113-125. ISBN 978-3-319-16500-4.
    Detail

    DOBAI Roland and SEKANINA Lukáš. Low-Level Flexible Architecture with Hybrid Reconfiguration for Evolvable Hardware. ACM Transactions on Reconfigurable Technology and Systems, vol. 8, no. 3, 2015, pp. 1-24. ISSN 1936-7406.
    Detail

    SEKANINA Lukáš. Principles and Applications of Polymorphic Circuits. Evolvable Hardware - From Practice to Application. Berlin: Springer Verlag, 2015, pp. 209-224. ISBN 978-3-662-44615-7.
    Detail

    PETRLÍK Jiří and SEKANINA Lukáš. Towards Robust and Accurate Traffic Prediction Using Parallel Multiobjective Genetic Algorithms and Support Vector Regression. In: 2015 IEEE 18th International Conference on Intelligent Transportation Systems. Los Alamitos: IEEE Computer Society, 2015, pp. 2231-2236. ISBN 978-1-4673-6596-3.
    Detail

  • 2014

    SEKANINA Lukáš, PTÁK Ondřej and VAŠÍČEK Zdeněk. Cartesian Genetic Programming as Local Optimizer of Logic Networks. In: 2014 IEEE Congress on Evolutionary Computation. Beijing: IEEE Computational Intelligence Society, 2014, pp. 2901-2908. ISBN 978-1-4799-1488-3.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Design of Approximate Multipliers Under Different Error Metrics. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warsaw: IEEE Computer Society, 2014, pp. 135-140. ISBN 978-1-4799-4558-0.
    Detail

    DOBAI Roland, GLETTE Kyrre, TORRESEN Jim and SEKANINA Lukáš. Evolutionary Digital Circuit Design with Fast Candidate Solution Establishment in Field Programmable Gate Arrays. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 85-92. ISBN 978-1-4799-4480-4.
    Detail

    MINAŘÍK Miloš and SEKANINA Lukáš. Exploring the Search Space of Hardware / Software Embedded Systems by Means of GP. In: Genetic Programming, 17th European Conference, EuroGP 2014. Lecture Notes in Computer Science, vol. 8599. Berlin: Springer Verlag, 2014, pp. 112-123. ISBN 978-3-662-44302-6.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. How to Evolve Complex Combinational Circuits From Scratch?. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 133-140. ISBN 978-1-4799-4480-4.
    Detail

    PLESKACZ Witold, RENOVELL Michel, SEKANINA Lukáš, BERNARD Serge and KASPROWICZ Dominik, ed. IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Warsaw: IEEE Computer Society, 2014. ISBN 978-1-4799-4560-3.
    Detail

    PETRLÍK Jiří, FUČÍK Otto and SEKANINA Lukáš. Multiobjective Selection of Input Sensors for SVR Applied to Road Traffic Prediction. In: Parallel Problem Solving from Nature - PPSN XIII. Lecture Notes in Computer Science, vol. 8672. Heidelberg: Springer Verlag, 2014, pp. 802-811. ISBN 978-3-319-10761-5.
    Detail

    PETRLÍK Jiří, FUČÍK Otto and SEKANINA Lukáš. Multiobjective Selection of Input Sensors for Travel Times Forecasting Using Support Vector Regression. In: 2014 IEEE Symposium on Computational Intelligence in Vehicles and Transportation Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 14-21. ISBN 978-1-4799-4498-9.
    Detail

    SEKANINA Lukáš and VAŠÍČEK Zdeněk. On Evolutionary Approximation of Logic Circuits. Computing with New Resources. Berlin: Springer Verlag, 2014, pp. 367-378. ISBN 978-3-319-13349-2.
    Detail

    DRAHOŠOVÁ Michaela, KOMJÁTHY Gergely and SEKANINA Lukáš. Towards Compositional Coevolution in Evolutionary Circuit Design. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 157-164. ISBN 978-1-4799-4479-8.
    Detail

    HRBÁČEK Radek and SEKANINA Lukáš. Towards Highly Optimized Cartesian Genetic Programming: From Sequential via SIMD and Thread to Massive Parallel Implementation. In: GECCO '14 Proceedings of the 2014 conference on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2014, pp. 1015-1022. ISBN 978-1-4503-2662-9.
    Detail

  • 2013

    KORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Advanced Approach to Calibration of Traffic Microsimulation Models using Travel Times. Journal of Cellular Automata, vol. 8, no. 6, 2013, pp. 457-467. ISSN 1557-5969.
    Detail

    SEKANINA Lukáš and VAŠÍČEK Zdeněk. Approximate Circuit Design by Means of Evolvable Hardware. In: 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapur: IEEE Computer Society, 2013, pp. 21-28. ISBN 978-1-4673-5847-7.
    Detail

    MINAŘÍK Miloš and SEKANINA Lukáš. Concurrent Evolution of Hardware and Software for Application-Specific Microprogrammed Systems. In: 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapur: IEEE Computational Intelligence Society, 2013, pp. 43-50. ISBN 978-1-4673-5869-9.
    Detail

    VAŠÍČEK Zdeněk, BIDLO Michal and SEKANINA Lukáš. Evolution of efficient real-time non-linear image filters for FPGAs. Soft Computing, vol. 17, no. 11, 2013, pp. 2163-2180. ISSN 1432-7643.
    Detail

    SEKANINA Lukáš, FEY Görschwin, RAIK Jaan, AUNET Snorre and RŮŽIČKA Richard, ed. IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Brno: IEEE Computer Society, 2013. ISBN 978-1-4673-6133-0.
    Detail

    DOBAI Roland and SEKANINA Lukáš. Image Filter Evolution on the Xilinx Zynq Platform. In: Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems. Torino: IEEE Circuits and Systems Society, 2013, pp. 164-171. ISBN 978-1-4673-6381-5.
    Detail

    SEKANINA Lukáš, RŮŽIČKA Richard, VAŠÍČEK Zdeněk, ŠIMEK Václav and HANÁČEK Petr. Implementing a Unique Chip ID on a Reconfigurable Polymorphic Circuit. Information Technology And Control, vol. 42, no. 1, 2013, pp. 7-14. ISSN 1392-124X.
    Detail

    PETRLÍK Jiří and SEKANINA Lukáš. Multiobjective evolution of approximate multiple constant multipliers. In: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2013. Brno: IEEE Computer Society, 2013, pp. 116-119. ISBN 978-1-4673-6133-0.
    Detail

    SALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, RIESGO Teresa and SEKANINA Lukáš. Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing. IEEE Transactions on Computers, vol. 62, no. 8, 2013, pp. 1481-1493. ISSN 0018-9340.
    Detail

    DOBAI Roland and SEKANINA Lukáš. Towards Evolvable Systems Based on the Xilinx Zynq Platform. In: 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapur: IEEE Computational Intelligence Society, 2013, pp. 89-95. ISBN 978-1-4673-5869-9.
    Detail

    SEKANINA Lukáš. Ubiquity symposium: Evolutionary computation and the processes of life: evolutionary computation in physical world. Ubiquity, vol. 2013, no. 2, pp. 1-7. ISSN 1530-2180.
    Detail

  • 2012

    SEKANINA Lukáš and VAŠÍČEK Zdeněk. A SAT-based Fitness Function for Evolutionary Optimization of Polymorphic Circuits. In: Proc. of the 2012 Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2012, pp. 715-720. ISBN 978-1-4577-2145-8.
    Detail

    SALVADOR Ruben, VIDAL Alberto, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling. Microprocessors and Microsystems, vol. 36, no. 5, 2012, pp. 427-438. ISSN 0141-9331.
    Detail

    DRAHOŠOVÁ Michaela and SEKANINA Lukáš. Acceleration of Evolutionary Image Filter Design Using Coevolution in Cartesian GP. Lecture Notes in Computer Science, vol. 2012, no. 7491, pp. 163-172. ISBN 978-3-642-32936-4. ISSN 0302-9743.
    Detail

    DRAHOŠOVÁ Michaela and SEKANINA Lukáš. Acceleration of Evolutionary Image Filter Design Using Coevolution in Cartesian GP. 8th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2012. ISBN 978-80-87342-15-2.
    Detail

    KORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Calibrating Traffic Simulation Model using Vehicle Travel Times. Lecture Notes in Computer Science, vol. 2012, no. 7495, pp. 807-816. ISSN 0302-9743.
    Detail

    ŽALOUDEK Luděk and SEKANINA Lukáš. Cellular automata-based systems with fault-tolerance. Natural Computing, vol. 11, no. 4, 2012, pp. 673-685. ISSN 1567-7818.
    Detail

    DRAHOŠOVÁ Michaela and SEKANINA Lukáš. Coevolution in Cartesian Genetic Programming. In: Proc. of the 15th European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 7244. Heidelberg: Springer Verlag, 2012, pp. 182-193. ISBN 978-3-642-29138-8.
    Detail

    PETRLÍK Jiří, KORČEK Pavol, FUČÍK Otto, BESZÉDEŠ Marián and SEKANINA Lukáš. Estimation of traffic density map using evolutionary algorithm. In: Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems. Anchorage: IEEE Intelligent Transportation Systems Society, 2012, pp. 632-637. ISBN 978-1-4673-3062-6.
    Detail

    KORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Evolutionary approach to calibration of cellular automaton based traffic simulation model. In: Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems. Anchorage: IEEE Intelligent Transportation Systems Society, 2012, pp. 122-129. ISBN 978-1-4673-3062-6.
    Detail

    SMOLKA Tobiáš, ŠVENDA Petr, SEKANINA Lukáš and MATYÁŠ Václav. Evolutionary Design of Message Efficient Secrecy Amplification Protocols. In: Proc. of the 15th European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 7244. Heidelberg: Springer Verlag, 2012, pp. 194-205. ISBN 978-3-642-29138-8.
    Detail

    SEKANINA Lukáš. Evolvable hardware. Handbook of Natural Computing. Berlin: Springer Verlag, 2012, pp. 1657-1705. ISBN 978-3-540-92909-3.
    Detail

    SALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, RIESGO Teresa and SEKANINA Lukáš. Implementation Techniques for Evolvable HW Systems: Virtual vs. Dynamic Reconfiguration. In: Proc. of the 22nd International Conference on Field Programmable Logic and Applications (FPL). Oslo: IEEE Computer Society, 2012, pp. 547-550. ISBN 978-1-4673-2257-7.
    Detail

    KOTÁSEK Zdeněk, BOUDA Jan, ČERNÁ Ivana, SEKANINA Lukáš, VOJNAR Tomáš and ANTOŠ David, ed. Mathematical and Engineering Methods in Computer Science, 7th International Doctoral Workshop, Revised Selected Papers. Lecture Notes in Computer Science, vol. 7119. Berlin: Springer Verlag, 2012. ISBN 978-3-642-25928-9.
    Detail

    PETRLÍK Jiří and SEKANINA Lukáš. Multiobjective Evolution of Multiple-Constant Multipliers. In: Proceedings of the 18th International Conference on Soft Computing (MENDEL2012). Brno: Faculty of Mechanical Engineering BUT, 2012, pp. 64-69. ISBN 978-80-214-4540-6.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. On Area Minimization of Complex Combinational Circuits Using Cartesian Genetic Programming. In: 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012, pp. 2379-2386. ISBN 978-1-4673-1508-1.
    Detail

    SEKANINA Lukáš and SALAJKA Vojtěch. Towards New Applications of Multi-Function Logic: Image Multi-Filtering. In: Proc. of the 2012 Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2012, pp. 824-827. ISBN 978-1-4577-2145-8.
    Detail

    SEKANINA Lukáš, SALAJKA Vojtěch and VAŠÍČEK Zdeněk. Two-Step Evolution of Polymorphic Circuits for Image Multi-Filtering. In: 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012, pp. 432-439. ISBN 978-1-4673-1508-1.
    Detail

  • 2011

    OTERO Andres, SALVADOR Ruben, MORA Javier, DE la Torre Eduardo, RIESGO Teresa and SEKANINA Lukáš. A Fast Reconfigurable 2D HW Core Architecture on FPGAs for Evolvable Self-Adaptive Systems. In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011, pp. 336-343. ISBN 978-1-4577-0599-1.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. A Global Postsynthesis Optimization Method for Combinational Circuits. In: Proc. of the Design, Automation and Test in Europe DATE 2011. Grenoble: European Design and Automation Association, 2011, pp. 1525-1528. ISBN 978-3-9810801-7-9.
    Detail

    KORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. A Scalable Cellular Automata Based Microscopic Traffic Simulation. In: Proceedings of the IEEE Intelligent Vehicles Symposium 2011 (IV11). Baden-Baden: IEEE Intelligent Transportation Systems Society, 2011, pp. 13-18. ISBN 978-1-4577-0889-3.
    Detail

    KORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. A Scalable Cellular Automata Based Microscopic Traffic Simulation. 7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2011. ISBN 978-80-214-4305-1.
    Detail

    RŮŽIČKA Richard, ŠIMEK Václav and SEKANINA Lukáš. Behavior of CMOS Polymorphic Circuits in High Temperature Environment. In: Proceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Cottbus: IEEE Computer Society, 2011, pp. 447-452. ISBN 978-1-4244-9753-9.
    Detail

    SALVADOR Ruben, VIDAL Alberto, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Bio-inspired FPGA architecture for self-calibration of an image compression core based on wavelet transforms in embedded systems. In: VLSI Circuits and Systems V. Proc. of SPIE Vol. 8067. Bellingham: SPIE - the international society for optics and photonics, 2011, pp. 1-13. ISBN 978-0-8194-8656-1.
    Detail

    KORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Cellular automata based traffic simulation accelerated on GPU. In: Proceedings of the 17th International Conference on Soft Computing (MENDEL2011). Brno: Institute of Automation and Computer Science FME BUT, 2011, pp. 395-402. ISBN 978-80-214-4302-0.
    Detail

    SEKANINA Lukáš and VAŠÍČEK Zdeněk. CGP Acceleration Using Field-Programmable Gate Arrays. Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011, pp. 217-230. ISBN 978-3-642-17309-7.
    Detail

    SEKANINA Lukáš. Evolution of digital circuits. In: Proceedings of the 2011 GECCO conference companion on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2011, pp. 1343-1359. ISBN 978-1-4503-0690-4.
    Detail

    SEKANINA Lukáš, WALKER James A., KAUFMANN Paul and PLATZNER Marco. Evolution of Electronic Circuits. Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011, pp. 125-179. ISBN 978-3-642-17309-7.
    Detail

    MINAŘÍK Miloš and SEKANINA Lukáš. Evolution of Iterative Formulas Using Cartesian Genetic Programming. Lecture Notes in Computer Science, vol. 2011, no. 6881, pp. 11-20. ISSN 0302-9743.
    Detail

    SALVADOR Ruben, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems. EURASIP Journal on Advances in Signal Processing, vol. 2011, no. 2011, pp. 1-20. ISSN 1687-6172.
    Detail

    VAŠÍČEK Zdeněk, BIDLO Michal, SEKANINA Lukáš and GLETTE Kyrre. Evolutionary Design of Efficient and Robust Switching Image Filters. In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011, pp. 192-199. ISBN 978-1-4577-0599-1.
    Detail

    SEKANINA Lukáš. Evolutionary hardware design (Invited Paper). In: VLSI Circuits and Systems V. Proc. of SPIE Vol. 8067. Bellingham: SPIE - the international society for optics and photonics, 2011, pp. 1-11. ISBN 978-0-8194-8656-1.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Optimization of Complex Digital Circuits. In: 7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2011, p. 1. ISBN 978-80-214-4305-1.
    Detail

    SALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, RIESGO Teresa and SEKANINA Lukáš. Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support. In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011, pp. 184-191. ISBN 978-1-4577-0599-1.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Extensions of Cartesian Genetic Programming for Optimization of Complex Combinational Circuits. In: Proc. of the 20th International Workshop on Logic and Synthesis. San Diego: University of California San Diego, 2011, pp. 55-61.
    Detail

    SALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, SEKANINA Lukáš and RIESGO Teresa. Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems. In: Proc. of the 2011 International Conference on ReConFigurable Computing and FPGAs. Los Alamitos: IEEE Computer Society, 2011, pp. 164-169. ISBN 978-0-7695-4551-6.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware. Genetic Programming and Evolvable Machines, vol. 12, no. 3, 2011, pp. 305-327. ISSN 1389-2576.
    Detail

    SEKANINA Lukáš and KOMENDA Tomáš. Global Control in Polymorphic Cellular Automata. Journal of Cellular Automata, vol. 6, no. 4, 2011, pp. 301-321. ISSN 1557-5969.
    Detail

    SEKANINA Lukáš, HARDING Simon L., BANZHAF Wolfgang and KOWALIW Taras. Image Processing and CGP. Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011, pp. 181-215. ISBN 978-3-642-17309-7.
    Detail

    ŽALOUDEK Luděk and SEKANINA Lukáš. Increasing Fault-Tolerance in Cellular-Based Systems. Lecture Notes in Computer Science, vol. 2011, no. 6714, pp. 234-245. ISSN 0302-9743.
    Detail

    KORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Microscopic traffic simulation using CUDA. In: Advanced Computer Architecture and Compilation for High-Performace and Embedded Systems (ACACES 2011) Poster Abstracts. Fiuggi: Academia Press, 2011, pp. 207-210. ISBN 978-90-382-1798-7.
    Detail

    GAJDA Zbyšek and SEKANINA Lukáš. On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits. Journal of Multiple-Valued Logic and Soft Computing, vol. 17, no. 6, 2011, pp. 607-631. ISSN 1542-3980.
    Detail

    GAJDA Zbyšek and SEKANINA Lukáš. Recent Advances in Evolutionary Synthesis and Optimization of Ordinary and Polymorphic Circuits. Brno: Faculty of Information Technology BUT, 2011. ISBN 978-80-214-4417-1.
    Detail

  • 2010

    VAŠÍČEK Zdeněk, SEKANINA Lukáš and BIDLO Michal. A Method for Design of Impulse Bursts Noise Filters Optimized for FPGA Implementations. In: DATE 2010: Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2010, pp. 1731-1736. ISBN 978-3-9810801-6-2.
    Detail

    ŽALOUDEK Luděk, SEKANINA Lukáš and ŠIMEK Václav. Accelerating Cellular Automata Evolution on Graphics Processing Units. International Journal on Advances in Software, vol. 3, no. 1, 2010, pp. 294-303. ISSN 1942-2628.
    Detail

    GAJDA Zbyšek and SEKANINA Lukáš. An Efficient Selection Strategy for Digital Circuit Evolution. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 6274. Berlin: Springer Verlag, 2010, pp. 13-24. ISBN 978-3-642-15322-8.
    Detail

    SEKANINA Lukáš. Evoluční návrh elektronických obvodů. Automa, vol. 2010, no. 1, pp. 48-51. ISSN 1210-9592.
    Detail

    SEKANINA Lukáš. Evoluční návrh hardware. Umelá inteligencia a kognitívna veda II. Edícia výskumných textov FIIT STU. Bratislava: Vydavateľstvo STU, 2010, pp. 437-465. ISBN 978-80-227-3284-0.
    Detail

    SEKANINA Lukáš. Evolutionary Circuit Design: Tutorial. In: Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010, pp. 5-5. ISBN 978-1-4244-6610-8.
    Detail

    SALVADOR Ruben, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems. In: Proc. of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2010, pp. 177-184. ISBN 978-1-4244-5888-2.
    Detail

    ŠIMÁČEK Jiří, SEKANINA Lukáš and STAREČEK Lukáš. Evolutionary Design of Reconfiguration Strategies to Reduce the Test Application Time. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 6274. Berlin: Springer Verlag, 2010, pp. 214-225. ISBN 978-3-642-15322-8.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Hardware Accelerator of Cartesian Genetic Programming with Multiple Fitness Units. Computing and Informatics, vol. 29, no. 6, 2010, pp. 1359-1371. ISSN 1335-9150.
    Detail

    SALVADOR Ruben, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs. In: Proc. of 13th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2010, pp. 96-103. ISBN 978-0-7695-4171-6.
    Detail

    SALVADOR Ruben, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Implementation of bio-inspired adaptive wavelet transforms in FPGAs. Modelling, validation and profiling of the algorithm. In: Proceedings of the XXV Conference on Design of Circuits and Integrated Systems. Lanzarote: The Universidad de Las Palmas de Gran Canaria, 2010, pp. 210-215. ISBN 978-84-693-7393-4.
    Detail

    ŠIMEK Václav, RŮŽIČKA Richard and SEKANINA Lukáš. On Analysis of Fabricated Polymorphic Circuits. In: Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010, pp. 281-284. ISBN 978-1-4244-6610-8.
    Detail

    BIDLO Michal and SEKANINA Lukáš. On Impact of Environment on the Complexity Generated by Evolutionary Development. In: MENDEL 2010 - 16th International Conference on Soft Computing. Brno: Faculty of Mechanical Engineering BUT, 2010, pp. 501-508. ISBN 978-80-214-4120-0.
    Detail

    FIŠER Petr, SCHMIDT Jan, VAŠÍČEK Zdeněk and SEKANINA Lukáš. On Logic Synthesis of Conventionally Hard to Synthesize Circuits Using Genetic Programming. In: Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010, pp. 346-351. ISBN 978-1-4244-6610-8.
    Detail

    KORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Towards Scalable and Accurate Microscopic Traffic Simulation Using Advanced Cellular Automata Based Models. In: Proceedings of the 13th International IEEE Conference on Intelligent Transportation Systems Workshops. Madeira Island: IEEE Intelligent Transportation Systems Society, 2010, pp. 27-35. ISBN 978-972-8822-20-0.
    Detail

    GAJDA Zbyšek and SEKANINA Lukáš. When Does Cartesian Genetic Programming Minimize the Phenotype Size Implicitly?. In: Proceeding of Genetic and Evolutionary Computation Conference, GECCO 2010. New York: Association for Computing Machinery, 2010, pp. 983-984. ISBN 978-1-4503-0072-8.
    Detail

  • 2009

    NEGOITA Mircea, SEKANINA Lukáš and STOICA Adrian. Adaptive and evolvable hardware and systems: the state of the art and the prospectus for future development. Journal of Automation, Mobile Robotics and Intelligent Systems, vol. 3, no. 2, 2009, pp. 70-75. ISSN 1897-8649.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Efficient Hardware Accelerator for Symbolic Regression Problems. In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Znojmo: Masaryk University, 2009, pp. 192-199. ISBN 978-80-87342-04-6.
    Detail

    SEKANINA Lukáš, VAŠÍČEK Zdeněk, RŮŽIČKA Richard, BIDLO Michal, JAROŠ Jiří and ŠVENDA Petr. Evoluční hardware: Od automatického generování patentovatelných invencí k sebemodifikujícím se strojům. Edice Gerstner. Praha: Academia, 2009. ISBN 978-80-200-1729-1.
    Detail

    VAŠÍČEK Zdeněk, BIDLO Michal, SEKANINA Lukáš, TORRESEN Jim, GLETTE Kyrre and FURUHOLMEN Marcus. Evolution of Impulse Bursts Noise Filters. In: Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2009, pp. 27-34. ISBN 978-0-7695-3714-6.
    Detail

    ŠVENDA Petr, SEKANINA Lukáš and MATYÁŠ Václav. Evolutionary Design of Secrecy Amplification Protocols for Wireless Sensor Networks. In: Proc. of the ACM Conference on Wireless Network Security. New York: Association for Computing Machinery, 2009, pp. 225-236. ISBN 978-1-60558-460-7.
    Detail

    SEKANINA Lukáš. Evolvable Hardware: From Applications to Implications for the Theory of Computation. In: Proc. of the 8th Int. Conference on Unconventional Computation. Lecture Notes in Computer Science, vol. 5715. Berlin: Springer Verlag, 2009, pp. 24-36. ISBN 978-3-642-03744-3.
    Detail

    GAJDA Zbyšek and SEKANINA Lukáš. Gate-Level Optimization of Polymorphic Circuits Using Cartesian Genetic Programming. In: Proc. of 2009 IEEE Congress on Evolutionary Computation. NA: IEEE Computational Intelligence Society, 2009, pp. 1599-1604. ISBN 978-1-4244-2958-5.
    Detail

    ŽALOUDEK Luděk, SEKANINA Lukáš and ŠIMEK Václav. GPU Accelerators for Evolvable Cellular Automata. In: Computation World: Future Computing, Service Computation, Adaptive, Content, Cognitive, Patterns. Athens: Institute of Electrical and Electronics Engineers, 2009, pp. 533-537. ISBN 978-0-7695-3862-4.
    Detail

    SEKANINA Lukáš, RŮŽIČKA Richard and GAJDA Zbyšek. Polymorphic FIR Filters with Backup Mode Enabling Power Savings. In: Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2009, pp. 43-50. ISBN 978-0-7695-3714-6.
    Detail

    SEKANINA Lukáš, RŮŽIČKA Richard, VAŠÍČEK Zdeněk, PROKOP Roman and FUJCIK Lukáš. REPOMO32 - New Reconfigurable Polymorphic Integrated Circuit for Adaptive Hardware. In: Proc. of the 2009 IEEE Symposium Series on Computational Intelligence - Workshop on Evolvable and Adaptive Hardware. Nashville: IEEE Computational Intelligence Society, 2009, pp. 39-46. ISBN 978-1-4244-2755-0.
    Detail

  • 2008

    NEGOITA Mircea, SEKANINA Lukáš and STOICA Adrian. Adaptive and Evolvable Hardware and Systems: The State of the Art and the Prospectus for Future Development. In: Knowledge-Based Intelligent Information and Engineering Systems. Lecture Notes in Computer Science, vol. 5179. Berlin: Springer Verlag, 2008, pp. 310-318. ISBN 978-3-540-85566-8.
    Detail

    SEKANINA Lukáš and MIKUŠEK Petr. Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures. In: Applications of Evolutionary Computing. Lecture Notes in Computer Science, vol. 4974. Berlin: Springer Verlag, 2008, pp. 144-153. ISBN 978-3-540-78760-0.
    Detail

    VAŠÍČEK Zdeněk, ČAPKA Ladislav and SEKANINA Lukáš. Analysis of Reconfiguration Options for a Reconfigurable Polymorphic Circuit. In: Proc. of the 2008 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2008, pp. 3-10. ISBN 978-0-7695-3166-3.
    Detail

    PEČENKA Tomáš, SEKANINA Lukáš and KOTÁSEK Zdeněk. Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability. ACM Transactions on Design Automation of Electronic Systems, vol. 13, no. 3, 2008, pp. 1-21. ISSN 1084-4309.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Hardware Accelerators for Cartesian Genetic Programming. In: Eleventh European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 4971. Berlin: Springer Verlag, 2008, pp. 230-241. ISBN 978-3-540-78670-2.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Novel Hardware Implementation of Adaptive Median Filters. In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Bratislava: IEEE Computer Society, 2008, pp. 110-115. ISBN 978-1-4244-2276-0.
    Detail

    VAŠÍČEK Zdeněk, ŽÁDNÍK Martin, SEKANINA Lukáš and TOBOLA Jiří. On Evolutionary Synthesis of Linear Transforms. In: Evolvable Systems: From Biology > to > Hardware. Lecture Notes in Computer Science, vol. 5216. Berlin: Springer Verlag, 2008, pp. 141-152. ISBN 978-3-540-85856-0.
    Detail

    RŮŽIČKA Richard, SEKANINA Lukáš and PROKOP Roman. Physical Demonstration of Polymorphic Self-checking Circuits. In: Proc. of the 14th IEEE Int. On-Line Testing Symposium. Los Alamitos: IEEE Computer Society, 2008, pp. 31-36. ISBN 978-0-7695-3264-6.
    Detail

    SEKANINA Lukáš, STAREČEK Lukáš, KOTÁSEK Zdeněk and GAJDA Zbyšek. Polymorphic Gates in Design and Test of Digital Circuits. International Journal of Unconventional Computing, vol. 4, no. 2, 2008, pp. 125-142. ISSN 1548-7199.
    Detail

    HORNBY Gregory S., SEKANINA Lukáš and HADDOW Pauline C., ed. Proceedings of Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 5216. Berlin: Springer Verlag, 2008. ISBN 978-3-540-85856-0.
    Detail

    STAREČEK Lukáš, SEKANINA Lukáš and KOTÁSEK Zdeněk. Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration. In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Bratislava: IEEE Computer Society, 2008, pp. 255-258. ISBN 978-1-4244-2276-0.
    Detail

    ŽALOUDEK Luděk and SEKANINA Lukáš. Transistor-level Evolution of Digital Circuits Using a Special Circuit Simulator. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 5216. Berlin: Springer Verlag, 2008, pp. 320-331. ISBN 978-3-540-85856-0.
    Detail

  • 2007

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs. In: Proc. of 2007 International Conference on Field Programmable Logic and Applications. Los Alamitos: IEEE Computer Society, 2007, pp. 216-221. ISBN 1424410606.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. An Evolvable Hardware System in Xilinx Virtex II Pro FPGA. International Journal of Innovative Computing and Applications, vol. 1, no. 1, 2007, pp. 63-73. ISSN 1751-648X.
    Detail

    SEKANINA Lukáš. Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates. In: 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Gliwice: IEEE Computer Society, 2007, pp. 243-246. ISBN 1424411610.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evaluation of a New Platform For Image Filter Evolution. In: Proc. of the 2007 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2007, pp. 577-584. ISBN 076952866X.
    Detail

    SEKANINA Lukáš. Evolution of Polymorphic Self-Checking Circuits. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 4684. Berlin: Springer Verlag, 2007, pp. 186-197. ISBN 978-3-540-74625-6.
    Detail

    SEKANINA Lukáš. Evolutionary Functional Recovery in Virtual Reconfigurable Circuits. ACM Journal on Emerging Technologies in Computing Systems, vol. 3, no. 2, 2007, pp. 1-22. ISSN 1550-4832.
    Detail

    SEKANINA Lukáš. Evolvable hardware: Tutorial. In: 2007 Genetic and Evolutionary Computational Conference. New York: Association for Computing Machinery, 2007, pp. 3627-3644. ISBN 9781595936981.
    Detail

    SEKANINA Lukáš. Evolved Computing Devices and the Implementation Problem. Minds and Machines, vol. 17, no. 3, 2007, pp. 311-329. ISSN 0924-6495.
    Detail

    SEKANINA Lukáš and MARTÍNEK Tomáš. Evolving Image Operators Directly in Hardware. Genetic and Evolutionary Computation for Image Processing and Analysis. EURASIP Book Series on Signal Processing and Communications, Volume 8. New York: Hindawi Publishing Corporation, 2007, pp. 93-112. ISBN 978-977-454-001-1.
    Detail

    SLANÝ Karel and SEKANINA Lukáš. Fitness Landscape Analysis and Image Filter Evolution Using Functional-Level CGP. In: Genetic Programming, 10th European Conference, EuroGP 2007. Lecture Notes in Computer Science, vol. 4445. Berlin: Springer Verlag, 2007, pp. 311-320. ISBN 978-3-540-71602-0.
    Detail

    STAREČEK Lukáš, SEKANINA Lukáš, GAJDA Zbyšek, KOTÁSEK Zdeněk, PROKOP Roman and MUSIL Vladislav. On Properties and Utilization of Some Polymorphic Gates. In: 6th Electronic Circuits and Systems Conference (ECS 2007). Bratislava: Faculty of Informatics and Information Technology Slovak University of Technology in Bratislava, 2007, pp. 77-81. ISBN 978-80-227-2697-9.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Reducing the Area on a Chip Using a Bank of Evolved Filters. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 4684. Berlin: Springer Verlag, 2007, pp. 222-232. ISBN 978-3-540-74625-6.
    Detail

    GAJDA Zbyšek and SEKANINA Lukáš. Reducing the Number of Transistors in Digital Circuits Using Gate-Level Evolutionary Design. In: 2007 Genetic and Evolutionary Computation Conference. New York: Association for Computing Machinery, 2007, pp. 245-252. ISBN 9781595936974.
    Detail

    SEKANINA Lukáš. Vztah mezi abstraktním a fyzickým výpočtem v kontextu evolučního návrhu. In: Kognice a umělý život VII. Opava: Silesian University, 2007, pp. 305-310. ISBN 9788072484126.
    Detail

  • 2006

    BIDLO Michal, BIDLO Radek and SEKANINA Lukáš. Designing a Novel General Sorting Network Constructor Using Artificial Evolution. TRANSACTIONS ON ENGINEERING, COMPUTING AND TECHNOLOGY, vol. 15, no. 10, 2006, pp. 85-90. ISBN 975-00803-4-3. ISSN 1305-5313.
    Detail

    SEKANINA Lukáš, STAREČEK Lukáš, GAJDA Zbyšek and KOTÁSEK Zdeněk. Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage. In: Proc. of the 1st NASA/ESA Conference on Adaptive Hardware and Systems. Piscataway: IEEE Computer Society, 2006, pp. 186-193. ISBN 0-7695-2614-4.
    Detail

    SEKANINA Lukáš. Evolutionary Approach to the Implementation Problem. Brno: Faculty of Information Technology BUT, 2006.
    Detail

    RŮŽIČKA Richard and SEKANINA Lukáš. Evolutionary Circuit Design in REPOMO - Reconfigurable Polymorphic Module. In: Proceedings of the Second IASTED International Conference on Computational Intelligence. Anaheim: ACTA Press, 2006, pp. 237-241. ISBN 0-88986-602-3.
    Detail

    SEKANINA Lukáš. Evolutionary Design of Digital Circuits: Where Are Current Limits?. In: Proc. of the 1st NASA/ESA Conference on Adaptive Hardware and Systems. Piscataway: IEEE Computer Society, 2006, pp. 171-178. ISBN 0-7695-2614-4.
    Detail

    SEKANINA Lukáš, MARTÍNEK Tomáš and GAJDA Zbyšek. Extrinsic and Intrinsic Evolution of Multifunctional Combinational Modules. In: 2006 IEEE World Congress on Computational Intelligence. CA: IEEE Computational Intelligence Society, 2006, pp. 9676-9683. ISBN 0-7803-9489-5.
    Detail

    PEČENKA Tomáš, KOTÁSEK Zdeněk and SEKANINA Lukáš. FITTest_BENCH06: A New Set of Benchmark Circuits Reflecting Testability Properties. In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Praha: IEEE Computer Society, 2006, pp. 285-289. ISBN 1424401844.
    Detail

    ZEBULUM Ricardo S., KEYMEULEN Didier, RAMESHAM Rajeshuni, SEKANINA Lukáš, MAO James, KUMAR Nikhil and STOICA Adrian. Characterization and Synthesis of Circuits at Extreme Low Temperatures. Evolvable Hardware. Genetic and Evolutionary Computation. Berlin: Springer Verlag, 2006, pp. 161-172. ISBN 0-387-24386-0.
    Detail

    SEKANINA Lukáš, STAREČEK Lukáš and KOTÁSEK Zdeněk. Novel Logic Circuits Controlled by Vdd. In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Praha: IEEE Computer Society, 2006, pp. 85-86. ISBN 1424401844.
    Detail

    SEKANINA Lukáš. On Dependability of FPGA-Based Evolvable Hardware Systems That Utilize Virtual Reconfigurable Circuits. In: Computing Frontiers 2006 Conference. New York: Association for Computing Machinery, 2006, pp. 221-228. ISBN 1595933026.
    Detail

    SEKANINA Lukáš and VAŠÍČEK Zdeněk. On the Practical Limits of the Evolutionary Digital Filter Design at the Gate Level. In: Applications of Evolutionary Computing. Lecture Notes in Computer Science, vol. 3907. Berlin: Springer Verlag, 2006, pp. 344-355. ISBN 978-3-540-33237-4.
    Detail

    BIDLO Michal and SEKANINA Lukáš. Prostředky pro podporu vzdělávání v oblasti biologií inspirovaných výpočetních systémů. In: Pedagogický software 2006. České Budějovice: Scientifik Pedagogical Publishing, 2006, pp. 81-83. ISBN 80-85645-56-4.
    Detail

    PEČENKA Tomáš, STRNADEL Josef, KOTÁSEK Zdeněk and SEKANINA Lukáš. Testability Estimation Based on Controllability and Observability Parameters. In: Proceedings of the 9th EUROMICRO Conference on Digital System Design (DSD'06). IEEE CS. Cavtat: IEEE Computer Society, 2006, pp. 504-514. ISBN 0-7695-2609-8.
    Detail

  • 2005

    MARTÍNEK Tomáš and SEKANINA Lukáš. An Evolvable Image Filter: Experimental Evaluation of a Complete Hardware Implementation in FPGA. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Berlin: Springer Verlag, 2005, pp. 76-85. ISBN 978-3-540-28736-0.
    Detail

    PEČENKA Tomáš, KOTÁSEK Zdeněk, SEKANINA Lukáš and STRNADEL Josef. Automatic Discovery of RTL Benchmark Circuits with Predefined Testability Properties. In: Proc. of the 2005 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2005, pp. 51-58. ISBN 0-7695-2399-4.
    Detail

    SEKANINA Lukáš. Design Methods for Polymorphic Digital Circuits. In: Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop. Sopron: University of West Hungary, 2005, pp. 145-150. ISBN 9639364487.
    Detail

    SEKANINA Lukáš. Evoluční design poráží řešení vytvořená kreativním návrhářem. Vesmír, vol. 84, no. 1, 2005, pp. 44-46. ISSN 0042-4544.
    Detail

    SEKANINA Lukáš and BIDLO Michal. Evolutionary Design of Arbitrarily Large Sorting Networks Using Development. Genetic Programming and Evolvable Machines, vol. 6, no. 3, 2005, pp. 319-347. ISSN 1389-2576.
    Detail

    SEKANINA Lukáš. Evolutionary Design of Gate-Level Polymorphic Digital Circuits. In: Applications of Evolutionary Computation. Lecture Notes in Computer Science, vol. 3449. Berlin: Springer Verlag, 2005, pp. 185-194. ISBN 978-3-540-25396-9.
    Detail

    SEKANINA Lukáš and ZEBULUM Ricardo S. Evolutionary discovering of the concept of the discrete state at the transistor level. In: Proc. of the 2005 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2005, pp. 73-78. ISBN 0-7695-2399-4.
    Detail

    ZEBULUM Ricardo S., STOICA Adrian, KEYMEULEN Didier and SEKANINA Lukáš. Evolvable Hardware System at Extreme Low Temperatures. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Berlin: Springer Verlag, 2005, pp. 37-45. ISBN 978-3-540-28736-0.
    Detail

    SEKANINA Lukáš and ZEBULUM Ricardo S. Intrinsic Evolution of Controllable Oscillators in FPTA-2. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2005, pp. 98-107. ISBN 978-3-540-28736-0.
    Detail

    KOŘENEK Jan and SEKANINA Lukáš. Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Berlin: Springer Verlag, 2005, pp. 46-55. ISBN 978-3-540-28736-0.
    Detail

    STRNADEL Josef, PEČENKA Tomáš and SEKANINA Lukáš. On Testability Analysis Driven Generation of Synthetic Register-Transfer Level Benchmark Circuits. In: Proceedings of 5th Electronic Circuits and Systems Conference. Bratislava: Slovak University of Technology in Bratislava, 2005, pp. 107-110.
    Detail

    BIDLO Michal and SEKANINA Lukáš. Providing Information from the Environment for Growing Electronic Circuits Through Polymorphic Gates. In: Proc. of Genetic and Evolutionary Computation Conference - Workshops 2005. New York: Association for Computing Machinery, 2005, pp. 242-248. ISBN 1-59593-097-3.
    Detail

  • 2004

    RŮŽIČKA Richard and SEKANINA Lukáš. A Platform for Demonstration of Analogue and Digital Circuits Evolution. In: Proceedings of the Sixth Internation Scientific Conference Electronic Computers nad Informatics 2004. Košice: The University of Technology Košice, 2004, pp. 158-163. ISBN 80-8073-150-0.
    Detail

    SEKANINA Lukáš and FRIEDL Štěpán. An Evolvable Combinational Unit for FPGAs. Computing and Informatics, vol. 23, no. 5, 2004, pp. 461-486. ISSN 1335-9150.
    Detail

    KOTÁSEK Zdeněk, PEČENKA Tomáš, STRNADEL Josef, MIKA Daniel and SEKANINA Lukáš. An Overview of Research Activities in Digital Circuit Diagnosis and Benchmarking. In: Proceedings of the Sixth Internation Scientific Conference Electronic Computers nad Informatics 2004. Košice: The University of Technology Košice, 2004, pp. 229-234. ISBN 80-8073-150-0.
    Detail

    TORRESEN Jim, BAKKE Jorgen W. and SEKANINA Lukáš. Efficient Image Filtering and Information Reduction in Reconfigurable Logic. In: Proc. of 2004 Norchip conference. Oslo: IEEE Computer Society Press, 2004, pp. 63-66. ISBN 0-7803-8510-1.
    Detail

    TORRESEN Jim, BAKKE Jorgen W. and SEKANINA Lukáš. Efficient Recognition of Speed Limit Signs. In: Proc. of the 7th International IEEE Conference on Intelligent Transportation Systems. Los Alamos: IEEE Computer Society Press, 2004, pp. 652-656. ISBN 0-7803-8501-2.
    Detail

    VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evoluční návrh kombinačních obvodů. Elektrorevue - www.elektrorevue.cz, vol. 2004, no. 43, pp. 1-6. ISSN 1213-1539.
    Detail

    KOTÁSEK Zdeněk, PEČENKA Tomáš, SEKANINA Lukáš and STRNADEL Josef. Evolutionary Design of Synthetic RTL Benchmark Circuits. In: Informal Digest of Papers, IEEE European Test Workshop 2004. Montpellier: IEEE Computer Society, 2004, pp. 107-108. ISBN 000000000.
    Detail

    SEKANINA Lukáš. Evolutionary Design Space Exploration for Median Circuits. Lecture Notes in Computer Science, vol. 2004, no. 3005, pp. 240-249. ISSN 0302-9743.
    Detail

    SEKANINA Lukáš. Evolvable computing by means of evolvable components. Natural Computing, vol. 3, no. 3, 2004, pp. 323-355. ISSN 15677818.
    Detail

    SEKANINA Lukáš. Evolving Constructors for Infinitely Growing Sorting Networks and Medians. Lecture Notes in Computer Science, vol. 2004, no. 2932, pp. 314-323. ISSN 0302-9743.
    Detail

    SEKANINA Lukáš and FRIEDL Štěpán. On Routine Implementation of Virtual Evolvable Devices Using COMBO6. In: Proc. of the 2004 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2004, pp. 63-70. ISBN 0-7695-2145-2.
    Detail

    TORRESEN Jim, BAKKE Jorgen W. and SEKANINA Lukáš. Recognizing Speed Limit Sign Numbers by Evolvable Hardware. Lecture Notes in Computer Science, vol. 2004, no. 3242, pp. 682-691. ISSN 0302-9743.
    Detail

    FRIEDL Štěpán and SEKANINA Lukáš. The First Circuits Evolved in a Physical Virtual Reconfigurable Device. In: Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Bratislava: Slovak Academy of Science, 2004, pp. 35-42. ISBN 80-969117-9-1.
    Detail

    SEKANINA Lukáš and DRÁBEK Vladimír. Theory and Applications of Evolvable Embedded Systems. In: Proc. of the 11th IEEE Int. Conference and Workshop on the Engineering of Computer-Based Systems. Los Alamitos, CA: IEEE Computer Society Press, 2004, pp. 186-193. ISBN 0-7695-2125-8.
    Detail

  • 2003

    SEKANINA Lukáš and RŮŽIČKA Richard. Easily Testable Image Operators: The Class of Circuits Where Evolution Beats Engineers. In: The 2003 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2003, pp. 135-144. ISBN 0-7695-1977-6.
    Detail

    SEKANINA Lukáš. Evolvable Components - From Theory to Hardware Implementations. Natural Computing Series. Berlin: Springer Verlag, 2003. ISBN 3-540-40377-9.
    Detail

    SEKANINA Lukáš. From Implementations to a General Concept of Evolvable Machines. Lecture Notes in Computer Science, vol. 2003, no. 2610, pp. 424-433. ISSN 0302-9743.
    Detail

    SEKANINA Lukáš and RŮŽIČKA Richard. On the Automatic Design of Testable Circuits. In: Proceedings of IEEE Workshop on Design nad Diagnostics of Electronic Circuits and Systems. Poznań: Publishing House of Poznan University of Technology, 2003, pp. 299-300. ISBN 83-7143-557-6.
    Detail

    KOTÁSEK Zdeněk, RŮŽIČKA Richard and SEKANINA Lukáš, ed. Sborník pracovního semináře "Počítačové architektury a diagnostika" pro studenty doktorského studia. Brno: Department of Computer Systems FIT BUT, 2003. ISBN 80-214-2471-0.
    Detail

    SEKANINA Lukáš. Towards Evolvable IP Cores for FPGAs. In: Proc. of The 2003 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2003, pp. 145-154. ISBN 0-7695-1977-6.
    Detail

    SEKANINA Lukáš. Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware. Lecture Notes in Computer Science, vol. 2003, no. 2606, pp. 186-197. ISSN 0302-9743.
    Detail

  • 2002

    SEKANINA Lukáš and DRÁBEK Vladimír. A Survey of Bioinspired Methods for Design of Fault Tolerant Reconfigurable Architectures. In: Proc. of the 8th Biennial Baltic Electronics Conference. Tallinn: Tallinn University of Technology, 2002, pp. 355-358. ISBN 9985-59-292-1.
    Detail

    SLLAME Azeddien M. and SEKANINA Lukáš. An Evolutionary-Based Algorithm to the Module Selection Problem with Resource Sharing in High-Level Synthesis. In: Advances in Nature-Inspired Computation: The PPSN VII Workshops. Reading: PEDAL, Department of Computer Science, University of Reading, 2002, pp. 45-46. ISBN 0-9543481-0-9.
    Detail

    SLLAME Azeddien M. and SEKANINA Lukáš. An Evolutionary-Based Algorithm to the Module Selection Process in High-Level Synthesis. In: Mendel 2002 - 8th International Conference on Soft Computing. Brno: Brno University of Technology, 2002, pp. 87-92. ISBN 80-214-2135-5.
    Detail

    SEKANINA Lukáš. Automata of Evolvable Computational Machines. In: Proc. ot 8th conference Student EEICT. Brno: Brno University of Technology, 2002, pp. 491-495. ISBN 80-214-2116-9.
    Detail

    SEKANINA Lukáš and DRÁBEK Vladimír. Automatic Design of Image Operators Using Evolvable Hardware. In: Proc. of 5th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Brno: Brno University of Technology, 2002, pp. 132-139. ISBN 80-214-2094-4.
    Detail

    DRÁBEK Vladimír and SEKANINA Lukáš. Basic Principles of Bio-Inspired Approaches to Fault Tolerance: Tutorial. In: Design for Test of Systems on Chip: Digital Test. Tallinn: Tallinn University of Technology, 2002, pp. 1-48. ISBN 0000-00-000-0.
    Detail

    SEKANINA Lukáš and TORRESEN Jim. Detection of Norwegian Speed Limit Signs. In: Proc. of the 16th European Simulation Multiconference. Delft: SCS Publication House, 2002, pp. 337-340. ISBN 90-77039-07-4.
    Detail

    SEKANINA Lukáš. Evolution of digital circuits operating as image filters in dynamically changing environment. In: Mendel 2002 - 8th International Conference on Soft Computing. Brno: Brno University of Technology, 2002, pp. 33-38. ISBN 80-214-2135-5.
    Detail

    SEKANINA Lukáš. Evolvable Computational Machines: Formal Approach. In: Intelligent Technologies - Theory and Applications, E-ISCI 2002. Frontiers in Artificial Intelligence and Applications. Amsterdam: IOS Press, 2002, pp. 166-172. ISBN 1-58603-256-9.
    Detail

    SEKANINA Lukáš. Image Filter Design with Evolvable Hardware. Lecture Notes in Computer Science, vol. 2002, no. 2279, pp. 255-266. ISSN 0302-9743.
    Detail

    SEKANINA Lukáš. Nanostructures and bio-inspired computer engineering. In: Proceedings of Nano02. Ostrava: Repronis, 2002, pp. 233-236. ISBN 80-7329-027-8.
    Detail

    SEKANINA Lukáš. Nanostructures and bio-inspired computer engineering (Abstract). In: Nano'02 (Abstracts). Brno: Akademické nakladatelství CERM, 2002, pp. 74-74. ISBN 80-7204-258-0.
    Detail

    SEKANINA Lukáš and DRÁBEK Vladimír. Soft-hardware. Vesmír, vol. 81, no. 7, 2002, pp. 393-395. ISSN 0042-4544.
    Detail

  • 2001

    SEKANINA Lukáš and DVOŘÁK Václav. A Totally Distributed Genetic Algorithm: From a Cellular System to the Mesh of Processors. In: Modelling and Simulation 2001. Prague: Faculty of Electrical Engineering, Czech Technical University, 2001, pp. 539-543. ISBN 1-56555-225-3.
    Detail

  • 2000

    SEKANINA Lukáš. Components and Communications in Evolvable System. In: Sborník prací studentů a doktorandů. Brno: Akademické nakladatelství CERM, 2000, pp. 231-233. ISBN 80-7204-155-X.
    Detail

    SEKANINA Lukáš and RŮŽIČKA Richard. Design of the Special Fast Reconfigurable Chip Using Common FPGA. In: Proc. of Design and Diagnostics of Electronic Circuits and Systems - IEEE DDECS'2000. Smolenice: unknown, 2000, pp. 161-168. ISBN 80-968320-3-4.
    Detail

    SEKANINA Lukáš and DRÁBEK Vladimír. Fault Tolerance and Reconfiguration in Cellular Systems. In: Proc. of Design and Diagnostics of Electronic Circuits and Systems - IEEE DDECS'2000. Smolenice: unknown, 2000, pp. 134-137. ISBN 80-968320-3-4.
    Detail

    SEKANINA Lukáš and DRÁBEK Vladimír. Relation Between Fault Tolerance and Reconfiguration in Cellular Systems. In: 6th IEEE Int. On-Line Testing Workshop. Palma de Mallorca, Spain: IEEE Computer Society Press, 2000, pp. 25-30. ISBN 0-7695-0646-1.
    Detail

    SLLAME Azeddien M. and SEKANINA Lukáš. Simulation and Modeling of Evolvable Hardware Based Systems. In: MS2000 International Conference on Modeling and Simulation. Las Palmas de Gran Canaria: unknown, 2000, pp. 485-492. ISBN 84-95286-59-9.
    Detail

    SEKANINA Lukáš and DRÁBEK Vladimír. The Concept of Pseudo Evolvable Hardware. In: IFAC Workshop on Programmable Devices and Systems 2000. Elsevier Science Ltd. Oxford: unknown, 2000, p. 6. ISBN 0-08-043620-X.
    Detail

    RŮŽIČKA Richard and SEKANINA Lukáš. The Role of Simulation During Design of Evolvable Systems. In: Proc. of 22-nd International Colloquium Advanced Simulation of Systems 2000. Ostrava, 2000, pp. 85-90. ISBN 80-85988-51-8.
    Detail

    SEKANINA Lukáš and SLLAME Azeddien M. Toward Uniform Approach to Design of Evolvable Hardware Based Systems. Lecture Notes in Computer Science, vol. 2000, no. 1896, pp. 814-817. ISSN 0302-9743.
    Detail

  • 1999

    SEKANINA Lukáš and DRÁBEK Vladimír. Evolvable hardware - evoluce na čipu. Elektrorevue - www.elektrorevue.cz, vol. 1, no. 5, 1999, p. 5. ISSN 1213-1539.
    Detail

    SEKANINA Lukáš. Evolvable Hardware as Non-Linear Predictor for Image Compression. In: Proc. of the 2nd Prediction Conference Nostradamus'99. Zlín: unknown, 1999, pp. 87-92. ISBN 80-214-1424-3.
    Detail

    SEKANINA Lukáš. Komprese obrazu s využitím modelu evolvable hardware. Sborník prací studentů a doktorandů, FEI VUT Brno. Brno: Akademické nakladatelství CERM, 1999, pp. 103-104. ISBN 80-214-1155-4.
    Detail

    SEKANINA Lukáš. Komprese obrazu s využitím modelu evolvable hardware. In: Konference Tvůrčí činnost studentů oboru VTI - TCS'99. Brno: Department of Computer Science and Engineering, 1999, p. 12.
    Detail

  • 1998

    SEKANINA Lukáš. Model vyvíjejících se obvodů. Sborník prací studentů a doktorandů, roč. IV, FEI VUT Brno. Brno: Akademické nakladatelství CERM, 1998, pp. 61-62. ISBN 80-214-1141-4.
    Detail

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