Curriculum
Education and academic qualification
- Ph.D. - Acceleration Methods for Evolutionary Design of Digital Circuits, Faculty of Information Technology, Brno University of Technology, 2012
Career overview
- Assistant professor - Faculty of Information Technology, Brno University of Technology (2012 - 2017)
- Associate professor - habilitation in computer science and engineering, Faculty of Information Technology, Brno University of Technology, since 2017 ( thesis: New methods for synthesis and approximation of logic circuits)
Prizing by scientific community
- Best Paper Award "Synthesis of approximate circuits for LUT-based FPGAs" at DDECS 2021
- Bronze Medal at Humies 2018 (GECCO, Kyoto) for evolutionary design of approximate arithmetic circuits (EHW@FIT + Verifit)
- Best interactive presentation award at the Design, Automation and Test in Europe (DATE 2017) conference in Lausanne (with V. Mrazek, R. Hrbacek, L. Sekanina)
- Best Paper Award "Cartesian GP in Optimization of Combinational Circuits with Hundreds of Inputs and Thousands of Gates" (EuroGP 2015)
- Gold Medal at Humies 2015 (GECCO, Madrid) for evolutionary approximation of digital circuits (with L. Sekanina)
- Our SSCI-ICES paper was selected among top 15 papers out of 1025 submissions (with L. Sekanina)
- Silver Medal at Humies 2011 (GECCO, Dublin) for evolutionary design of digital circuits.
- Best paper award at MEMICS 2009 (co-authored with L. Sekanina)