Evolvable Hardware Research Group
https://ehw.fit.vutbr.cz/
Publications
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2024
KLHŮFEK Jan, ŠAFÁŘ Miroslav, MRÁZEK Vojtěch, VAŠÍČEK Zdeněk and SEKANINA Lukáš. Exploiting Quantization and Mapping Synergy in Hardware-Aware Deep Neural Network Accelerators. In: 2024 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS). Kielce: Institute of Electrical and Electronics Engineers, 2024, pp. 1-6. ISBN 979-8-3503-5934-3.
DetailHUSA Jakub and SEKANINA Lukáš. Semantic Mutation Operator for Fast and Efficient Design of Bent Boolean Functions. Genetic Programming and Evolvable Machines, vol. 25, no. 3, 2024, pp. 1-32. ISSN 1389-2576.
DetailVAŠÍČEK Zdeněk, MRÁZEK Vojtěch and SEKANINA Lukáš. Automated Verifiability-Driven Design of Approximate Circuits: Exploiting Error Analysis. In: 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE). Valencia: Institute of Electrical and Electronics Engineers, 2024, pp. 1-6. ISBN 979-8-3503-4859-0.
DetailPIŇOS Michal, SEKANINA Lukáš and MRÁZEK Vojtěch. ApproxDARTS: Differentiable Neural Architecture Search with Approximate Multipliers. In: 2024 The International Joint Conference on Neural Networks (IJCNN). Yokohama: Institute of Electrical and Electronics Engineers, 2024, pp. 1-8. ISBN 979-8-3503-5931-2.
DetailMRÁZEK Vojtěch, KOKKINIS Argyrios, PAPANIKOLAOU Panagiotis, VAŠÍČEK Zdeněk, SIOZIOS Kostas, TZIMPRAGOS Georgios, TAHOORI Mehdi and ZERVAKIS Georgios. Evolutionary Approximation of Ternary Neurons for On-sensor Printed Neural Networks. In: 2024 IEEE/ACM International Conference on Computer Aided Design (ICCAD). New Jersey, 2024, p. 9.
DetailSCHWARZEROVÁ Jana, HURTA Martin, BARTOŇ Vojtěch, LEXA Matej, WALTHER Dirk, PROVAZNÍK Valentine and WECKWERTH Wolfram. A perspective on genetic and polygenic risk scores-advances and limitations and overview of associated tools. Briefings in Bioinformatics, vol. 25, no. 3, 2024, pp. 1-11. ISSN 1467-5463.
DetailDENIZIAK Stanisław, SITEK Paweł, JENIHHIN Maksim, STEININGER Andreas, SCHÖLZEL Mario and MRÁZEK Vojtěch, ed. 27th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Kliece: Institute of Electrical and Electronics Engineers, 2024. ISBN 979-8-3503-5934-3.
DetailŠÍMA Jiří, MRÁZEK Vojtěch and VIDNEROVÁ Petra. Energy Complexity of Convolutional Neural Networks. Neural Computation, vol. 36, no. 8, 2024, pp. 1601-1625. ISSN 0899-7667.
DetailARIF Muhammad, REHMAN (ur) Faizan, SEKANINA Lukáš and MALIK Aamir Saeed. A comprehensive survey of evolutionary algorithms and metaheuristics in brain EEG-based applications. Journal of Neural Engineering, vol. 21, no. 5, 2024, pp. 1-25. ISSN 1741-2552.
DetailSEKANINA Lukáš. Tutorial: Evolutionary Design Methods in Electronic Design Automation. In: IEEE 42nd International Conference on Computer Design (ICCD). Milano: IEEE Computer Society, 2024, pp. 689-690. ISBN 979-8-3503-8040-8.
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2023
PIŇOS Michal, MRÁZEK Vojtěch, VAVERKA Filip, VAŠÍČEK Zdeněk and SEKANINA Lukáš. Acceleration Techniques for Automated Design of Approximate Convolutional Neural Networks. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 13, no. 1, 2023, pp. 212-224. ISSN 2156-3357.
DetailLOJDA Jakub, PÁNEK Richard, SEKANINA Lukáš and KOTÁSEK Zdeněk. Automated Design and Usage of the Fault-Tolerant Dynamic Partial Reconfiguration Controller for FPGAs. Microelectronics Reliability, vol. 2023, no. 144, pp. 1-16. ISSN 0026-2714.
DetailHURTA Martin, MRÁZEK Vojtěch, DRAHOŠOVÁ Michaela and SEKANINA Lukáš. ADEE-LID: Automated Design of Energy-Efficient Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers. In: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE). Antwerp: Institute of Electrical and Electronics Engineers, 2023, pp. 1-2. ISBN 978-3-9819263-7-8.
DetailPIŇOS Michal, MRÁZEK Vojtěch and SEKANINA Lukáš. Prediction of Inference Energy on CNN Accelerators Supporting Approximate Circuits. In: 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Talinn: Institute of Electrical and Electronics Engineers, 2023, pp. 45-50. ISBN 979-8-3503-3277-3.
DetailJŮZA Tadeáš and SEKANINA Lukáš. GPAM: Genetic Programming with Associative Memory. In: 26th European Conference on Genetic Programming (EuroGP) Held as Part of EvoStar. LNCS, vol. 13986. Cham: Springer Nature Switzerland AG, 2023, pp. 68-83. ISBN 978-3-031-29572-0. ISSN 0302-9743.
DetailMRÁZEK Vojtěch, JAWED Soyiba, ARIF Muhammad and MALIK Aamir Saeed. Effective EEG Feature Selection for Interpretable MDD (Major Depressive Disorder) Classification. In: GECCO 2023 - Proceedings of the 2023 Genetic and Evolutionary Computation Conference. Lisbon: Association for Computing Machinery, 2023, pp. 1427-1435. ISBN 979-8-4007-0119-1.
DetailHURTA Martin, MRÁZEK Vojtěch, DRAHOŠOVÁ Michaela and SEKANINA Lukáš. MODEE-LID: Multiobjective Design of Energy-Efficient Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers. In: 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). Tallinn: Institute of Electrical and Electronics Engineers, 2023, pp. 155-160. ISBN 979-8-3503-3277-3.
DetailSEDLÁČEK Marek and SEKANINA Lukáš. Evolution of Editing Scripts From Examples. In: Proceedings of the Genetic and Evolutionary Computation Conference Companion (GECCO '23). Lisbon: Association for Computing Machinery, 2023, pp. 803-806. ISBN 979-8-4007-0120-7.
DetailKALKREUTH Roman, VAŠÍČEK Zdeněk, HUSA Jakub, VERMETTEN Diederick, YE Furong and THOMAS Bäck. Towards a General Boolean Function Benchmark Suite. In: GECCO 2023 Companion - Proceedings of the 2023 Genetic and Evolutionary Computation Conference Companion. New York: Association for Computing Machinery, 2023, pp. 591-594. ISBN 979-8-4007-0120-7.
DetailHURTA Martin, MRÁZEK Vojtěch, DRAHOŠOVÁ Michaela and SEKANINA Lukáš. Multi-objective Design of Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers. Evo* 2023 -- Late-Breaking Abstracts Volume. Brno, 2023.
DetailMRÁZEK Vojtěch. Approximation of Hardware Accelerators driven by Machine-Learning Models. In: Proceedings of International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS '23). Tallinn: Institute of Electrical and Electronics Engineers, 2023, pp. 91-92. ISBN 979-8-3503-3277-3.
DetailHUSA Jakub and SEKANINA Lukáš. Semantic Mutation Operator for Fast and Efficient Design of Bent Boolean Functions. Evo* 2023 -- Late-Breaking Abstracts Volume. Brno, 2023.
DetailGIACOBINI Mario, PAPPA Gisele and VAŠÍČEK Zdeněk, ed. Genetic Programming. LNCS 13986. Cham: Springer Verlag, 2023. ISBN 978-3-031-29572-0.
DetailKALKREUTH Roman, VAŠÍČEK Zdeněk, HUSA Jakub, VERMETTEN Diederick, YE Furong and THOMAS Bäck. General Boolean Function Benchmark Suite. In: FOGA 2023 - Proceedings of the 17th ACM/SIGEVO Conference on Foundations of Genetic Algorithms. Potsdam: Association for Computing Machinery, 2023, pp. 84-95. ISBN 979-8-4007-0202-0.
DetailSEKANINA Lukáš, MRÁZEK Vojtěch and PIŇOS Michal. Hardware-Aware Evolutionary Approaches to Deep Neural Networks. Handbook of Evolutionary Machine Learning. Genetic and Evolutionary Computation. Singapore: Springer Nature Singapore, 2023, pp. 367-396. ISBN 978-981-9938-13-1.
DetailPRABAKARAN Bharath S., MRÁZEK Vojtěch, VAŠÍČEK Zdeněk, SEKANINA Lukáš and SHAFIQUE Muhammad. Xel-FPGAs: An End-to-End Automated Exploration Framework for Approximate Accelerators in FPGA-Based Systems. In: 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD). San Francisco: Institute of Electrical and Electronics Engineers, 2023, pp. 1-9. ISBN 979-8-3503-1559-2.
DetailŠÍMA Jiří, VIDNEROVÁ Petra and MRÁZEK Vojtěch. Energy Complexity Model for Convolutional Neural Networks. In: Artificial Neural Networks and Machine Learning - ICANN 2023: 32nd International Conference on Artificial Neural Networks. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Heraklion, 2023, pp. 186-198. ISBN 978-3-031-44203-2.
DetailHURTA Martin, SCHWARZEROVÁ Jana, PROVAZNÍK Valentine, WECKWERTH Wolfram, WALTHER Dirk and SEKANINA Lukáš. Utilizing Cartesian Genetic Programming for Efficient Polygenic Risk Score Calculation in Plants. Program and Abstract Book: Swedish Bioinformatics Workshop 2023. Stockholm, 2023.
DetailNAGELE Thomas, WECKWERTH Wolfram, HURTA Martin, SCHWARZEROVÁ Jana, SEKANINA Lukáš and PROVAZNÍK Valentine. Utilizing Genetic Programming to Enhance Polygenic Risk Score Calculation. In: 2023 IEEE International Conference on Bioinformatics and Biomedicine (BIBM 2023). Istanbul: Institute of Electrical and Electronics Engineers, 2023, pp. 3782-3787. ISBN 979-8-3503-3748-8.
DetailMARCHISIO Alberto, BUSSOLINO Beatrice, COLUCCI Alessio, MRÁZEK Vojtěch, HANIF Muhammad A., MARTINA Mauricio, MASERA Guido and SHAFIQUE Muhammad. Hardware and Software Optimizations for Capsule Networks. Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing. Cham: Springer Nature Switzerland AG, 2023, pp. 303-328. ISBN 978-3-031-39932-9.
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2022
MARCHISIO Alberto, MRÁZEK Vojtěch, MASSA Andrea, BUSSOLINO Beatrice, MARTINA Mauricio and SHAFIQUE Muhammad. RoHNAS: A Neural Architecture Search Framework with Conjoint Optimization for Adversarial Robustness and Hardware Efficiency of Convolutional and Capsule Networks. IEEE Access, vol. 2022, no. 10, pp. 109043-109055. ISSN 2169-3536.
DetailHANIF Muhammad A., MRÁZEK Vojtěch and SHAFIQUE Muhammad. Approximate Computing Architectures. Handbook of Computer Architecture. Handbook of Computer Architecture. Singapore: Springer Nature Singapore, 2022, pp. 1-41. ISBN 978-981-1564-01-7.
DetailKLHŮFEK Jan and MRÁZEK Vojtěch. ArithsGen: Arithmetic Circuit Generator for Hardware Accelerators. In: 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS '22). Prague: Institute of Electrical and Electronics Engineers, 2022, pp. 44-47. ISBN 978-1-6654-9431-1.
DetailČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk and VOJNAR Tomáš. SagTree: Towards Efficient Mutation in Evolutionary Circuit Approximation. Swarm and Evolutionary Computation, vol. 69, no. 100986, 2022, pp. 1-10. ISSN 2210-6502.
DetailHURTA Martin, DRAHOŠOVÁ Michaela, SEKANINA Lukáš, SMITH Stephen L. and ALTY Jane E. Evolutionary Design of Reduced Precision Levodopa-Induced Dyskinesia Classifiers. In: Genetic Programming, 25th European Conference, EuroGP 2022. Lecture Notes in Computer Science, vol. 13223. Madrid: Springer Nature Switzerland AG, 2022, pp. 85-101. ISBN 978-3-031-02055-1.
DetailPIŇOS Michal, MRÁZEK Vojtěch and SEKANINA Lukáš. Evolutionary Approximation and Neural Architecture Search. Genetic Programming and Evolvable Machines, vol. 23, no. 3, 2022, pp. 351-374. ISSN 1389-2576.
DetailVÁLEK Matěj and SEKANINA Lukáš. Evolutionary Approximation in Non-Local Means Image Filters. In: 2022 IEEE International Conference on Systems, Man, and Cybernetics (SMC). Praha: Institute of Electrical and Electronics Engineers, 2022, pp. 2759-2766. ISBN 978-1-6654-5258-8.
DetailMRÁZEK Vojtěch. Optimization of BDD-based Approximation Error Metrics Calculations. In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI '22). Paphos: Institute of Electrical and Electronics Engineers, 2022, pp. 86-91. ISBN 978-1-6654-6605-9.
DetailHURTA Martin, DRAHOŠOVÁ Michaela and MRÁZEK Vojtěch. Evolutionary Design of Reduced Precision Preprocessor for Levodopa-Induced Dyskinesia Classifier. In: Parallel Problem Solving from Nature - PPSN XVII. Lecture Notes in Computer Science, vol. 13398. Dortmund: Springer Nature Switzerland AG, 2022, pp. 491-504. ISBN 978-3-031-14713-5.
DetailČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch and VOJNAR Tomáš. Designing Approximate Arithmetic Circuits with Combined Error Constraints. In: Proceeding of 25th Euromicro Conference on Digital System Design 2022 (DSD'22). Gran Canaria: Institute of Electrical and Electronics Engineers, 2022, pp. 785-792. ISBN 978-1-6654-7404-7.
DetailSEKANINA Lukáš, VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Inexact Arithmetic Operators. Approximate Computing Techniques. Cham: Springer International Publishing, 2022, pp. 81-107. ISBN 978-3-030-94704-0.
DetailKALKREUTH Roman, DAL Piccol Sotto Léo Françoso and VAŠÍČEK Zdeněk. Graph-based Genetic Programming. In: GECCO 2022 Companion - Proceedings of the 2022 Genetic and Evolutionary Computation Conference. Boston: Association for Computing Machinery, 2022, pp. 958-982. ISBN 978-1-4503-9268-6.
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2021
PIŇOS Michal, MRÁZEK Vojtěch and SEKANINA Lukáš. Evolutionary Neural Architecture Search Supporting Approximate Multipliers. In: Genetic Programming, 24th European Conference, EuroGP 2021. Lecture Notes in Computer Science, vol 12691, vol. 12691. Seville: Springer Nature Switzerland AG, 2021, pp. 82-97. ISBN 978-3-030-72812-0.
DetailMARCHISIO Alberto, MRÁZEK Vojtěch, HANIF Muhammad A. and SHAFIQUE Muhammad. DESCNet: Developing Efficient Scratchpad Memories for Capsule Network Hardware. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 40, no. 9, 2021, pp. 1768-1781. ISSN 1937-4151.
DetailMARCHISIO Alberto, MRÁZEK Vojtěch, HANIF Muhammad A. and SHAFIQUE Muhammad. FEECA: Design Space Exploration for Low-Latency and Energy-Efficient Capsule Network Accelerators. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 4, 2021, pp. 716-729. ISSN 1063-8210.
DetailVAŠÍČEK Zdeněk. Synthesis of approximate circuits for LUT-based FPGAs. In: 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). Vienna: IEEE Computer Society, 2021, pp. 17-22. ISBN 978-1-6654-3595-6.
DetailBIDLO Michal. Evolution of Approximate Functions for Image Thresholding. In: IEEE Symposium Series on Computational Intelligence (IEEE SSCI). Los Alamos: IEEE Computer Society, 2021, pp. 1-6. ISBN 978-1-7281-9048-8.
DetailSHAFIQUE Muhammad, STEININGER Andreas, SEKANINA Lukáš, KRSTIĆ Miloš, STOJANOVIC Goran and MRÁZEK Vojtěch, ed. 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. USA: Institute of Electrical and Electronics Engineers, 2021. ISBN 978-1-6654-3595-6.
DetailKOCNOVÁ Jitka and VAŠÍČEK Zdeněk. Resynthesis of logic circuits using machine learning and reconvergent paths. In: 2021 24th Euromicro Conference on Digital System Design (DSD). Palermo: Institute of Electrical and Electronics Engineers, 2021, pp. 69-76. ISBN 978-1-6654-2704-3.
DetailSEKANINA Lukáš. Evolutionary Algorithms in Approximate Computing: A Survey. Journal of Integrated Circuits and Systems, vol. 16, no. 2, 2021, pp. 1-12. ISSN 1872-0234.
DetailBARBARESCHI Mario, BOSIO Alberto, SEKANINA Lukáš and BRAUN Claus. Editorial: Special issue on Advancing on Approximate Computing: Methodologies, Architectures and Algorithms. Future Generation Computer Systems, vol. 124, no. 1, 2021. ISSN 0167-739X.
DetailHODAŇ David, MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Semantically-oriented mutation operator in cartesian genetic programming for evolutionary circuit design. Genetic Programming and Evolvable Machines, vol. 22, no. 4, 2021, pp. 539-572. ISSN 1389-2576.
DetailSEKANINA Lukáš. Neural Architecture Search and Hardware Accelerator Co-Search: A Survey. IEEE Access, vol. 9, no. 9, 2021, pp. 151337-151362. ISSN 2169-3536.
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2020
BIDLO Michal and DOBEŠ Michal. Evolutionary Development of Generic Sorting Networks by Means of Rewriting Systems. IEEE Transactions on Evolutionary Computation, vol. 24, no. 2, 2020, pp. 232-244. ISSN 1089-778X.
DetailANSARI Mohammad S., MRÁZEK Vojtěch, COCKBURN Bruce F., SEKANINA Lukáš, VAŠÍČEK Zdeněk and HAN Jie. Improving the Accuracy and Hardware Efficiency of Neural Networks Using Approximate Multipliers. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 2, 2020, pp. 317-328. ISSN 1063-8210.
DetailMARCHISIO Alberto, MRÁZEK Vojtěch, HANIF Muhammad A. and SHAFIQUE Muhammad. ReD-CaNe: A Systematic Methodology for Resilience Analysis and Design of Capsule Networks under Approximations. In: Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. Grenoble: Institute of Electrical and Electronics Engineers, 2020, pp. 1205-1210. ISBN 978-3-9819263-4-7.
DetailVAVERKA Filip, MRÁZEK Vojtěch, VAŠÍČEK Zdeněk and SEKANINA Lukáš. TFApprox: Towards a Fast Emulation of DNN Approximate Hardware Accelerators on GPU. In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE). Grenoble: Institute of Electrical and Electronics Engineers, 2020, pp. 294-297. ISBN 978-3-9819263-4-7.
DetailMRÁZEK Vojtěch, SEKANINA Lukáš and VAŠÍČEK Zdeněk. Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks. In: 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems. Genoa: Institute of Electrical and Electronics Engineers, 2020, pp. 243-247. ISBN 978-1-7281-4922-6.
DetailKOCNOVÁ Jitka and VAŠÍČEK Zdeněk. EA-based Resynthesis: An Efficient Tool for Optimization of Digital Circuits. Genetic Programming and Evolvable Machines, vol. 21, no. 3, 2020, pp. 287-319. ISSN 1389-2576.
DetailBIDLO Michal. Evolution of Cellular Automata with Conditionally Matching Rules for Image Filtering. In: 2020 IEEE Congress on Evolutionary Computation (CEC). Los Alamitos: IEEE Computational Intelligence Society, 2020, pp. 1-8. ISBN 978-1-7281-6929-3.
DetailGROCHOL David and SEKANINA Lukáš. Evolutionary Design of Hash Functions for IPv6 Network Flow Hashing. In: IEEE Congress on Evolutionary Computation. Los Alamitos: IEEE Computational Intelligence Society, 2020, pp. 1-8. ISBN 978-1-7281-6929-3.
DetailPRABAKARAN Bharath S., MRÁZEK Vojtěch, VAŠÍČEK Zdeněk, SEKANINA Lukáš and SHAFIQUE Muhammad. ApproxFPGAs: Embracing ASIC-based Approximate Arithmetic Components for FPGA-Based Systems. In: 2020 57th ACM/IEEE Design Automation Conference (DAC). San Francisco: Institute of Electrical and Electronics Engineers, 2020, pp. 1-6. ISBN 978-1-4503-6725-7.
DetailHUSA Jakub and SEKANINA Lukáš. Evolving Cryptographic Boolean Functions with Minimal Multiplicative Complexity. In: 2020 IEEE Congress on Evolutionary Computation (CEC). Los Alamitos: IEEE Computational Intelligence Society, 2020, pp. 1-8. ISBN 978-1-7281-6929-3.
DetailHODAŇ David, MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Semantically-Oriented Mutation Operator in Cartesian Genetic Programming for Evolutionary Circuit Design. In: GECCO 2020 - Proceedings of the 2020 Genetic and Evolutionary Computation Conference. Cancún: Association for Computing Machinery, 2020, pp. 940-948. ISBN 978-1-4503-7128-5.
DetailHU Ting, NICOLAU Miguel and SEKANINA Lukáš. Special issue on highlights of genetic programming 2019 events. Genetic Programming and Evolvable Machines, vol. 21, no. 3, 2020. ISSN 1389-2576.
DetailBOSIO Alberto, DI Carlo Stefano, GIRARD Patrick, SANCHEZ Ernesto, SAVINO Aessandro, SEKANINA Lukáš, TRAIOLA Marcello, VAŠÍČEK Zdeněk and VIRAZEL Arnaud. Design, Verification, Test and In-Field Implications of Approximate Computing Systems. In: 25th IEEE European Test Symposium. Los Alamitos: Institute of Electrical and Electronics Engineers, 2020, pp. 1-10. ISBN 978-1-7281-4312-5.
DetailČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk and VOJNAR Tomáš. Adaptive verifiability-driven strategy for evolutionary approximation of arithmetic circuits. Applied Soft Computing, vol. 95, no. 106466, 2020, pp. 1-17. ISSN 1568-4946.
DetailMARCHISIO Alberto, MASSA Andrea, MRÁZEK Vojtěch, BUSSOLINO Beatrice, MARTINA Mauricio and SHAFIQUE Muhammad. NASCaps: A Framework for Neural Architecture Search to Optimize the Accuracy and Hardware Efficiency of Convolutional Capsule Networks. In: IEEE/ACM International Conference on Computer-Aided Design (ICCAD '20). Virtual Event: Association for Computing Machinery, 2020, pp. 1-9. ISBN 978-1-4503-8026-3.
DetailBIDLO Michal and ŽUFAN Petr. On Comparison of Some Representations for the Evolution of Quantum Operators. In: 2020 IEEE Symposium Series on Computational Intelligence, SSCI 2020. Canberra: Institute of Electrical and Electronics Engineers, 2020, pp. 2101-2108. ISBN 978-1-7281-2547-3.
DetailČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch and VOJNAR Tomáš. Satisfiability Solving Meets Evolutionary Optimisation in Designing Approximate Circuits. In: Theory and Applications of Satisfiability Testing - SAT 2020. Lecture Notes in Computer Science, vol. 12178. Alghero: Springer International Publishing, 2020, pp. 481-491. ISBN 978-3-030-51824-0.
DetailMRÁZEK Vojtěch, SEKANINA Lukáš and VAŠÍČEK Zdeněk. Libraries of Approximate Circuits: Automated Design and Application in CNN Accelerators. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 10, no. 4, 2020, pp. 406-418. ISSN 2156-3357.
DetailCOLUCCI Alessio, MARCHISIO Alberto, BUSSOLINO Beatrice, MRÁZEK Vojtěch, MARTINA Mauricio, MASERA Guido and SHAFIQUE Muhammad. A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress. In: 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)}. Singapore: Institute of Electrical and Electronics Engineers, 2020, pp. 34-36. ISBN 978-1-7281-9198-0.
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2019
DRAHOŠOVÁ Michaela, SEKANINA Lukáš and WIGLASZ Michal. Adaptive Fitness Predictors in Coevolutionary Cartesian Genetic Programming. Evolutionary Computation, vol. 27, no. 3, 2019, pp. 497-523. ISSN 1063-6560.
DetailSEKANINA Lukáš, VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Automated Search-Based Functional Approximation for Digital Circuits. Approximate Circuits - Methodologies and CAD. Heidelberg: Springer International Publishing, 2019, pp. 175-203. ISBN 978-3-319-99322-5.
DetailMRÁZEK Vojtěch, SEKANINA Lukáš, DOBAI Roland, SÝS Marek and ŠVENDA Petr. Efficient On-Chip Randomness Testing Utilizing Machine Learning Techniques. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 12, 2019, pp. 2734-2744. ISSN 1063-8210.
DetailVAŠÍČEK Zdeněk, MRÁZEK Vojtěch and SEKANINA Lukáš. Automated Circuit Approximation Method Driven by Data Distribution. In: Design, Automation and Test in Europe Conference. Florence: European Design and Automation Association, 2019, pp. 96-101. ISBN 978-3-9819263-2-3.
DetailKOCNOVÁ Jitka and VAŠÍČEK Zdeněk. EA-based refactoring of mapped logic circuits. In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS). Red Hook, NY: IEEE Computer Society Press, 2019, pp. 1-5. ISBN 978-1-7281-0397-6.
DetailREK Petr and SEKANINA Lukáš. TypeCNN: CNN Development Framework With Flexible Data Types. In: Design, Automation and Test in Europe Conference. Florence: European Design and Automation Association, 2019, pp. 292-295. ISBN 978-3-9819263-2-3.
DetailKOCNOVÁ Jitka and VAŠÍČEK Zdeněk. Towards a Scalable EA-based Optimization of Digital Circuits. In: Genetic Programming 22nd European Conference, EuroGP 2019. Cham: Springer International Publishing, 2019, pp. 81-97. ISBN 978-3-030-16669-4.
DetailKONČAL Ondřej and SEKANINA Lukáš. Cartesian Genetic Programming as an Optimizer of Programs Evolved with Geometric Semantic Genetic Programming. In: Genetic Programming 22nd European Conference, EuroGP 2019. Cham: Springer International Publishing, 2019, pp. 98-113. ISBN 978-3-030-16669-4.
DetailMRÁZEK Vojtěch, HANIF Muhammad A., VAŠÍČEK Zdeněk, SEKANINA Lukáš and SHAFIQUE Muhammad. autoAx: An Automatic Design Space Exploration and Circuit Building Methodology utilizing Libraries of Approximate Components. In: The 56th Annual Design Automation Conference 2019 (DAC '19). Las Vegas: Association for Computing Machinery, 2019, pp. 1-6. ISBN 978-1-4503-6725-7.
DetailBIDLO Michal. Evolution of Cellular Automata Development Using Various Representations. In: GECCO '19 Proceedings of the Genetic and Evolutionary Computation Conference Companion. Praha: Association for Computing Machinery, 2019, pp. 107-108. ISBN 978-1-4503-6748-6.
DetailHUSA Jakub. Comparison of Genetic Programming Methods on Design of Cryptographic Boolean Functions. In: Genetic Programming 22st European Conference, EuroGP 2019, Proceedings. Cham: Springer International Publishing, 2019, pp. 228-244. ISBN 978-3-030-14811-9.
DetailHUSA Jakub. Designing Correlation Immune Boolean Functions With Minimal Hamming Weight Using Various Genetic Programming Methods. In: GECCO '19 Proceedings of the Genetic and Evolutionary Computation Conference Companion. Praha: Association for Computing Machinery, 2019, pp. 342-343. ISBN 978-1-4503-6748-6.
DetailKOCNOVÁ Jitka and VAŠÍČEK Zdeněk. Impact of subcircuit selection on the efficiency of CGP-based optimization of gate-level circuits. In: GECCO '19 Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York: Association for Computing Machinery, 2019, pp. 377-378. ISBN 978-1-4503-6748-6.
DetailMRÁZEK Vojtěch, VAŠÍČEK Zdeněk, SEKANINA Lukáš, HANIF Muhammad A. and SHAFIQUE Muhammad. ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining. In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. Denver: Institute of Electrical and Electronics Engineers, 2019, pp. 1-8. ISBN 978-1-7281-2350-9.
DetailSEKANINA Lukáš, HU Ting, LOURENÇO Nuno, RICHTER Hendrik and GARCÍA-SÁNCHEZ Pablo, ed. Genetic Programming 22nd European Conference. Lecture Notes in Computer Science, vol. 11451. Cham: Springer International Publishing, 2019. ISBN 978-3-030-16669-4.
DetailBIDLO Michal and KORGO Jakub. Ant Colony Optimisation for Performing Computational Task in Cellular Automata. Mendel, vol. 25, no. 1, 2019, pp. 147-156. ISSN 1803-3814.
DetailBIDLO Michal. Comparison of Evolutionary Development of Cellular Automata Using Various Representations. Mendel, vol. 2019, no. 1, pp. 95-102. ISSN 1803-3814.
DetailBIDLO Michal. Advances in the Evolution of Complex Cellular Automata. Computational Intelligence. International Joint Conference, IJCCI 2016 Porto, Portugal, November 9-11, 2016 Revised Selected Papers. Cham: Springer International Publishing, 2019, pp. 123-146. ISBN 978-3-319-99282-2.
DetailBADÁŇ Filip and SEKANINA Lukáš. Optimizing Convolutional Neural Networks for Embedded Systems By Means of Neuroevolution. In: Theory and Practice of Natural Computing. LNCS 11934. Cham: Springer International Publishing, 2019, pp. 109-121. ISBN 978-3-030-34499-3.
DetailVAŠÍČEK Zdeněk. Formal Methods for Exact Analysis of Approximate Circuits. IEEE Access, vol. 7, no. 1, 2019, pp. 177309-177331. ISSN 2169-3536.
DetailSTAMENKOVIC Zoran, BOSIO Alberto, CSEREY Gyorgy, NOVÁK Ondřej, PLESKACZ Witold, SEKANINA Lukáš, STEININGER Andreas, STOJANOVIC Goran and STOPJAKOVÁ Viera. International Symposium on Design and Diagnostics of Electronic Circuits and Systems. In: 2019 IEEE International Test Conference. Washington, DC: Institute of Electrical and Electronics Engineers, 2019, pp. 1-4. ISBN 978-1-7281-4823-6.
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2018
SEKANINA Lukáš. Approximate Computing: An Old Job for Cartesian Genetic Programming?. Inspired by Nature. Emergence, Complexity and Computation, Vol. 28. Cham: Springer International Publishing, 2018, pp. 195-212. ISBN 978-3-319-67996-9.
DetailVAŠÍČEK Zdeněk. Bridging the Gap Between Evolvable Hardware and Industry Using Cartesian Genetic Programming. Inspired by Nature. Emergence, Complexity and Computation, Vol. 28. Cham: Springer International Publishing, 2018, pp. 39-55. ISBN 978-3-319-67996-9.
DetailMRÁZEK Vojtěch, VAŠÍČEK Zdeněk and HRBÁČEK Radek. Role of circuit representation in evolutionary design of energy-efficient approximate circuits. IET Computers & Digital Techniques, vol. 2018, no. 4, pp. 139-149. ISSN 1751-8601.
DetailGROCHOL David and SEKANINA Lukáš. Multi-Objective Evolution of Ultra-Fast General-Purpose Hash Functions. In: European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 10781. Berlin: Springer International Publishing, 2018, pp. 187-202. ISBN 978-3-319-77553-1.
DetailHUSA Jakub and KALKREUTH Roman. A Comparative Study on Crossover in Cartesian Genetic Programming. In: Genetic Programming 21st European Conference, EuroGP 2018, Proceedings. Cham: Springer International Publishing, 2018, pp. 203-219. ISBN 978-3-319-77553-1. ISSN 0302-9743.
DetailMRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Evolutionary Design of Large Approximate Adders Optimized for Various Error Criteria. In: Proceedings of the Genetic and Evolutionary Computation Conference Companion (GECCO '18). Kyoto: Association for Computing Machinery, 2018, pp. 294-295. ISBN 978-1-4503-5764-7.
DetailMRÁZEK Vojtěch, VAŠÍČEK Zdeněk, SEKANINA Lukáš, JIANG Honglan and HAN Jie. Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 11, 2018, pp. 2572-2576. ISSN 1063-8210.
DetailMRÁZEK Vojtěch, SÝS Marek, VAŠÍČEK Zdeněk, SEKANINA Lukáš and MATYÁŠ Václav. Evolving Boolean Functions for Fast and Efficient Randomness Testing. In: Proceedings of the Genetic and Evolutionary Computation Conference (GECCO '18). Kyoto: Association for Computing Machinery, 2018, pp. 1302-1309. ISBN 978-1-4503-5618-3.
DetailWIGLASZ Michal and SEKANINA Lukáš. Cooperative Coevolutionary Approximation in HOG-based Human Detection Embedded System. In: 2018 IEEE Symposium Series on Computational Intelligence (SSCI 2018). Bengaluru: Institute of Electrical and Electronics Engineers, 2018, pp. 1313-1320. ISBN 978-1-5386-9276-9.
DetailCASTELLI Mauro, SEKANINA Lukáš, ZHANG Mengjie, CAGNONI Stefano and GARCÍA-SÁNCHEZ Pablo, ed. 21st European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 10781. Berlin: Springer International Publishing, 2018. ISBN 978-3-319-77552-4.
DetailGROCHOL David and SEKANINA Lukáš. Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs. In: Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems. Edinburgh: Institute of Electrical and Electronics Engineers, 2018, pp. 257-263. ISBN 978-1-5386-7753-7.
DetailMRÁZEK Vojtěch, VAŠÍČEK Zdeněk and SEKANINA Lukáš. Design of Quality-Configurable Approximate Multipliers Suitable for Dynamic Environment. In: Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems. Edinburgh: Institute of Electrical and Electronics Engineers, 2018, pp. 264-271. ISBN 978-1-5386-7753-7.
DetailSEKANINA Lukáš, VAŠÍČEK Zdeněk, BOSIO Alberto, TRAIOLA Marcello, RECH Paolo, OLIVEIRA Daniel, FERNANDES Fernando and DI Carlo Stefano. Special Session: How Approximate Computing impacts Verification, Test and Reliability. 2018 IEEE 36th VLSI Test Symposium. San Francisco: IEEE Computer Society, 2018. ISBN 978-1-5386-3774-6.
DetailSEKANINA Lukáš, MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Design Space Exploration for Approximate Implementations of Arithmetic Data Path Primitives. In: 25th IEEE International Conference on Electronics Circuits and Systems (ICECS). Bordeaux: IEEE Circuits and Systems Society, 2018, pp. 377-380. ISBN 978-1-5386-9562-3.
DetailTREFZER Martin A. and SEKANINA Lukáš. Guest Editorial: Bio-inspired Hardware and Evolvable Systems. IET Computers & Digital Techniques, vol. 12, no. 4, 2018. ISSN 1751-8601.
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2017
GROCHOL David and SEKANINA Lukáš. Comparison of Parallel Linear Genetic Programming Implementations. In: Recent Advances in Soft Computing: Proceedings of the 22nd International Conference on Soft Computing (MENDEL 2016) held in Brno, Czech Republic, at June 8-10, 2016. Cham: Springer International Publishing, 2017, pp. 64-76. ISBN 978-3-319-58088-3.
DetailVAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Trading between Quality and Non-functional Properties of Median Filter in Embedded Systems. Genetic Programming and Evolvable Machines, vol. 18, no. 1, 2017, pp. 45-82. ISSN 1389-2576.
DetailDOBAI Roland, KOŘENEK Jan and SEKANINA Lukáš. Evolutionary design of hash function pairs for network filters. Applied Soft Computing, vol. 56, no. 7, 2017, pp. 173-181. ISSN 1568-4946.
DetailMRÁZEK Vojtěch, HRBÁČEK Radek, VAŠÍČEK Zdeněk and SEKANINA Lukáš. EvoApprox8b: Library of Approximate Adders and Multipliers for Circuit Design and Benchmarking of Approximation Methods. In: Proc. of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lausanne: European Design and Automation Association, 2017, pp. 258-261. ISBN 978-3-9815370-9-3.
DetailVAŠÍČEK Zdeněk, MRÁZEK Vojtěch and SEKANINA Lukáš. Towards Low Power Approximate DCT Architecture for HEVC Standard. In: Proc. of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lausanne: European Design and Automation Association, 2017, pp. 1576-1581. ISBN 978-3-9815370-9-3.
DetailBIDLO Michal. Evolution of Cellular Automata-Based Replicating Structures Exhibiting Unconventional Features. International Joint Conference, IJCCI 2015 Lisbon, Portugal, November 12-14, 2015, Revised Selected Papers. Computational Intelligence. Cham: Springer International Publishing, 2017, pp. 21-41. ISBN 978-3-319-48506-5.
DetailKIDOŇ Marek and DOBAI Roland. Evolutionary design of hash functions for IP address hashing using genetic programming. In: 2017 IEEE Congress on Evolutionary Computation (CEC). San Sebastian: Institute of Electrical and Electronics Engineers, 2017, pp. 1720-1727. ISBN 978-1-5090-4601-0.
DetailGROCHOL David and SEKANINA Lukáš. Multiobjective Evolution of Hash Functions for High Speed Networks. In: Proceedings of the 2017 IEEE Congress on Evolutionary Computation. San Sebastian: IEEE Computer Society, 2017, pp. 1533-1540. ISBN 978-1-5090-4600-3.
DetailKEŠNER Filip, SEKANINA Lukáš and BRÁZDIL Milan. Modular Framework for Detection of Inter-ictal Spikes in iEEG. In: The 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC'17). Los Alamos: Institute of Electrical and Electronics Engineers, 2017, pp. 418-421. ISBN 978-1-5090-2809-2.
DetailMRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Parallel Optimization of Transistor Level Circuits using Cartesian Genetic Programming. In: GECCO Companion '17 Proceedings of the Companion Publication of the 2017 on Genetic and Evolutionary Computation Conference. Berlin: Association for Computing Machinery, 2017, pp. 1849-1856. ISBN 978-1-4503-4939-0.
DetailHUSA Jakub and DOBAI Roland. Designing Bent Boolean Functions With Parallelized Linear Genetic Programming. In: GECCO Companion '17 Proceedings of the Companion Publication of the 2017 on Genetic and Evolutionary Computation Conference. Berlín: Association for Computing Machinery, 2017, pp. 1825-1832. ISBN 978-1-4503-4939-0.
DetailVAŠÍČEK Zdeněk. Relaxed equivalence checking: a new challenge in logic synthesis. In: Proceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems. Dresden: IEEE Computer Society, 2017, pp. 1-6. ISBN 978-1-5386-0472-4.
DetailČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk and VOJNAR Tomáš. Approximating Complex Arithmetic Circuits with Formal Error Guarantees: 32-bit Multipliers Accomplished. In: Proceedings of 36th IEEE/ACM International Conference On Computer Aided Design (ICCAD). Irvine, CA: Institute of Electrical and Electronics Engineers, 2017, pp. 416-423. ISBN 978-1-5386-3093-8.
DetailMCDERMOTT James, CASTELLI Mauro, SEKANINA Lukáš, HAASDIJK Evert and GARCÍA-SÁNCHEZ Pablo, ed. 20th European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 10196. Berlin: Springer International Publishing, 2017. ISBN 978-3-319-55696-3.
DetailWIGLASZ Michal and SEKANINA Lukáš. Evolutionary Approximation of Gradient Orientation Module in HOG-based Human Detection System. In: 2017 IEEE Global Conference on Signal and Information Processing GlobalSIP 2017. Montreal: IEEE Signal Processing Society, 2017, pp. 1300-1304. ISBN 978-1-5090-5989-8.
DetailSHAFIQUE Muhammad, HAFIZ Rehan, JAVED Muhammad Usama, ABBAS Sarmad, SEKANINA Lukáš, VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap. In: 2017 IEEE Computer Society Annual Symposium on VLSI. Los Alamitos: IEEE Computer Society Press, 2017, pp. 627-632. ISBN 978-1-5090-6762-6.
DetailSEKANINA Lukáš, VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Approximate Circuits in Low-Power Image and Video Processing: The Approximate Median Filter. Radioengineering, vol. 26, no. 3, 2017, pp. 623-632. ISSN 1210-2512.
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2016
GROCHOL David, SEKANINA Lukáš, KOŘENEK Jan, ŽÁDNÍK Martin and KOŠAŘ Vlastimil. Evolutionary Circuit Design for Fast FPGA-Based Classification of Network Application Protocols. Applied Soft Computing, vol. 38, no. 1, 2016, pp. 933-941. ISSN 1568-4946.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Design of Complex Approximate Combinational Circuits. Genetic Programming and Evolvable Machines, vol. 17, no. 2, 2016, pp. 169-192. ISSN 1389-2576.
DetailSÁNCHEZ-CLEMENTE Antonio José, ENTRENA Luis, HRBÁČEK Radek and SEKANINA Lukáš. Error Mitigation using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches. IEEE Transactions on Reliability, vol. 65, no. 4, 2016, pp. 1871-1883. ISSN 0018-9529.
DetailDVOŘÁČEK Petr and SEKANINA Lukáš. Evolutionary Approximation of Edge Detection Circuits. In: 19th European Conference on Genetic programming. Lecture Notes in Computer Science, vol. 9594. Berlin: Springer International Publishing, 2016, pp. 19-34. ISBN 978-3-319-30667-4.
DetailWIGLASZ Michal and DRAHOŠOVÁ Michaela. Plastic Fitness Predictors Coevolved with Cartesian Programs. In: 19th European Conference on Genetic programming. Lecture Notes in Computer Science, vol. 9594. Berlin: Springer International Publishing, 2016, pp. 164-179. ISBN 978-3-319-30667-4.
DetailHOLÍK Lukáš, LENGÁL Ondřej, ROGALEWICZ Adam, SEKANINA Lukáš, VAŠÍČEK Zdeněk and VOJNAR Tomáš. Towards Formal Relaxed Equivalence Checking in Approximate Computing Methodology. In: 2nd Workshop on Approximate Computing (WAPCO 2016). Prague, 2016, pp. 1-6.
DetailSEKANINA Lukáš and VAŠÍČEK Zdeněk. Genetic Improvement for Approximate Computing. In: 2nd Workshop on Approximate Computing (WAPCO 2016). Prague, 2016, pp. 1-2.
DetailSEKANINA Lukáš. Introduction to Approximate Computing: Embedded Tutorial. In: 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Košice: Institute of Electrical and Electronics Engineers, 2016, pp. 90-95. ISBN 978-1-5090-2467-4.
DetailGROCHOL David and SEKANINA Lukáš. Evolutionary Design of Fast High-quality Hash Functions for Network Applications. In: GECCO '16 Proceedings of the 2016 on Genetic and Evolutionary Computation Conference. New York, NY: Association for Computing Machinery, 2016, pp. 901-908. ISBN 978-1-4503-4206-3.
DetailHRBÁČEK Radek, MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms. In: Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era. Istanbul: Istanbul Sehir University, 2016, pp. 239-244. ISBN 978-1-5090-0335-8.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Search-based synthesis of approximate circuits implemented into FPGAs. In: 26th International Conference on Field Programmable Logic and Applications. Lausanne: Institute of Electrical and Electronics Engineers, 2016, pp. 1-4. ISBN 978-2-8399-1844-2.
DetailSEKANINA Lukáš and KAPUSTA Vlastimil. Visualisation and Analysis of Genetic Records Produced by Cartesian Genetic Programming. In: GECCO'16 Companion. New York: Association for Computing Machinery, 2016, pp. 1411-1418. ISBN 978-1-4503-4323-7.
DetailMRÁZEK Vojtěch, SARWAR Syed Shakib, SEKANINA Lukáš, VAŠÍČEK Zdeněk and ROY Kaushik. Design of Power-Efficient Approximate Multipliers for Approximate Artificial Neural Networks. In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. Austin, TX: Association for Computing Machinery, 2016, pp. 811-817. ISBN 978-1-4503-4466-1.
DetailBIDLO Michal. Evolution of Generic Square Calculations in Cellular Automata. In: Proceedings of the 8th International Joint Conference on Computational Intelligence - Volume 3: ECTA. Porto: SciTePress - Science and Technology Publications, 2016, pp. 94-102. ISBN 978-989-758-201-1.
DetailBIDLO Michal. Evolution of Complex Emergent Behaviour in Multi-State Cellular Automata. In: Proceedings of the 2016 on Genetic and Evolutionary Computation Conference Companion. New York: Association for Computing Machinery, 2016, pp. 157-158. ISBN 978-1-4503-4323-7.
DetailMRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Automatic Design of Arbitrary-Size Approximate Sorting Networks with Error Guarantee. In: Power and Timing Modeling, Optimization and Simulation (PATMOS), 2016 26rd International Workshop on. Bremen: Institute of Electrical and Electronics Engineers, 2016, pp. 221-228. ISBN 978-1-5090-0733-2.
DetailMRÁZEK Vojtěch. Evoluční snižování příkonu: Od obvodů na úrovni tranzistorů po neuronové sítě na čipu. In: Počítačové architektury a diagnostika PAD 2016. Bořetice: Faculty of Information Technology BUT, 2016, pp. 61-64. ISBN 978-80-214-5376-0.
DetailGROCHOL David. Evoluční hardware v síťových aplikacích. In: Počítačové architektury a diagnostika PAD 2016. Bořetice: Faculty of Information Technology BUT, 2016, pp. 57-60. ISBN 978-80-214-5376-0.
DetailDOBAI Roland, KOŘENEK Jan and SEKANINA Lukáš. Adaptive Development of Hash Functions in FPGA-Based Network Routers. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: IEEE Computational Intelligence Society, 2016, pp. 1-8. ISBN 978-1-5090-4240-1.
DetailVAVERKA Filip, HRBÁČEK Radek and SEKANINA Lukáš. Evolving Component Library for Approximate High Level Synthesis. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: IEEE Computational Intelligence Society, 2016, pp. 1-8. ISBN 978-1-5090-4240-1.
DetailVAŠÍČEK Zdeněk, MRÁZEK Vojtěch and SEKANINA Lukáš. Evolutionary Functional Approximation of Circuits Implemented into FPGAs. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: Institute of Electrical and Electronics Engineers, 2016, pp. 1-8. ISBN 978-1-5090-4240-1.
DetailBIDLO Michal. On Routine Evolution of Complex Cellular Automata. IEEE Transactions on Evolutionary Computation, vol. 20, no. 5, 2016, pp. 742-754. ISSN 1089-778X.
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2015
DOBAI Roland and SEKANINA Lukáš. Low-Level Flexible Architecture with Hybrid Reconfiguration for Evolvable Hardware. ACM Transactions on Reconfigurable Technology and Systems, vol. 8, no. 3, 2015, pp. 1-24. ISSN 1936-7406.
DetailSEKANINA Lukáš. Principles and Applications of Polymorphic Circuits. Evolvable Hardware - From Practice to Application. Berlin: Springer Verlag, 2015, pp. 209-224. ISBN 978-3-662-44615-7.
DetailSEKANINA Lukáš and VAŠÍČEK Zdeněk. Functional Equivalence Checking for Evolution of Complex Digital Circuits. Evolvable Hardware - From Practice to Application. Berlin: Springer Verlag, 2015, pp. 175-189. ISBN 978-3-662-44615-7.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Circuit Approximation Using Single- and Multi-Objective Cartesian GP. In: Genetic Programming. Lecture Notes in Computer Science, vol. 9025. Berlin: Springer International Publishing, 2015, pp. 217-229. ISBN 978-3-319-16500-4.
DetailSEKANINA Lukáš and VAŠÍČEK Zdeněk. Evolutionary Computing in Approximate Circuit Design and Optimization. In: 1st Workshop on Approximate Computing (WAPCO 2015). Amsterdam, 2015, pp. 1-6.
DetailGROCHOL David, SEKANINA Lukáš, ŽÁDNÍK Martin and KOŘENEK Jan. A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP. In: Applications of Evolutionary Computation, 18th European Conference. Lecture Notes in Computer Science, vol. 9028. Berlin: Springer International Publishing, 2015, pp. 67-78. ISBN 978-3-319-16548-6.
DetailVAŠÍČEK Zdeněk. Cartesian GP in Optimization of Combinational Circuits with Hundreds of Inputs and Thousands of Gates. In: Genetic Programming, 18th European Conference, EuroGP 2015. LCNS 9025. Berlin: Springer International Publishing, 2015, pp. 139-150. ISBN 978-3-319-16500-4.
DetailMRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Evolutionary Design of Transistor Level Digital Circuits using Discrete Simulation. In: Genetic Programming, 18th European Conference, EuroGP 2015. LCNS 9025. Berlin: Springer International Publishing, 2015, pp. 66-77. ISBN 978-3-319-16500-4.
DetailDRAHOŠOVÁ Michaela, HULVA Jiří and SEKANINA Lukáš. Indirectly Encoded Fitness Predictors Coevolved with Cartesian Programs. In: Genetic Programming. Lecture Notes in Computer Science, vol. 9025. Berlin: Springer International Publishing, 2015, pp. 113-125. ISBN 978-3-319-16500-4.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary approximation of complex digital circuits. In: Proceedings of the Companion Publication of the 2015 on Genetic and Evolutionary Computation Conference. New York: Association for Computing Machinery, 2015, pp. 1505-1506. ISBN 978-1-4503-3488-4.
DetailHRBÁČEK Radek. Parallel Multi-Objective Evolutionary Design of Approximate Circuits. In: GECCO '15 Proceedings of the 2015 conference on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2015, pp. 687-694. ISBN 978-1-4503-3472-3.
DetailBIDLO Michal. On Routine Evolution of New Replicating Structures in Cellular Automata. In: 7th International Conference on Evolutionary Computationa Theory and Applications. 7th International Joint Conference on Computational Intelligence. Lisbon: SciTePress - Science and Technology Publications, 2015, pp. 28-38. ISBN 978-989-758-157-1.
DetailMRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Automatic Design of Low-Power VLSI Circuits: Accurate and Approximate Multipliers. In: Proceedings of 13th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing. Porto: Institute of Electrical and Electronics Engineers, 2015, pp. 106-113. ISBN 978-1-4673-8299-1.
DetailMRÁZEK Vojtěch, VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Approximation of Software for Embedded Systems: Median Function. In: GECCO Companion '15 Proceedings of the Companion Publication of the 2015 on Genetic and Evolutionary Computation Conference. ACM. New York: Association for Computing Machinery, 2015, pp. 795-801. ISBN 978-1-4503-3488-4.
DetailPETRLÍK Jiří and SEKANINA Lukáš. Towards Robust and Accurate Traffic Prediction Using Parallel Multiobjective Genetic Algorithms and Support Vector Regression. In: 2015 IEEE 18th International Conference on Intelligent Transportation Systems. Los Alamitos: IEEE Computer Society, 2015, pp. 2231-2236. ISBN 978-1-4673-6596-3.
DetailMRÁZEK Vojtěch. Evoluční návrh nízkopříkonových obvodů. In: Počítačové architektury a diagnostika PAD 2015. Zlín: Faculty of Applied Informatics, Tomas Bata University in Zlín, 2015, pp. 1-6. ISBN 978-80-7454-522-1.
DetailDOBAI Roland and KOŘENEK Jan. Evolution of Non-Cryptographic Hash Function Pairs for FPGA-Based Network Applications. In: 2015 IEEE Symposium Series on Computational Intelligence. Cape Town: Institute of Electrical and Electronics Engineers, 2015, pp. 1214-1219. ISBN 978-1-4799-7560-0.
DetailBIDLO Michal. Investigation of Replicating Tiles in Cellular Automata Designed by Evolution Using Conditionally Matching Rules. In: 2015 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2015 IEEE Symposium Series on Computational Intelligence (SSCI). Cape Town: IEEE Computational Intelligence Society, 2015, pp. 1506-1513. ISBN 978-1-4799-7560-0.
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2014
MINAŘÍK Miloš and SEKANINA Lukáš. Exploring the Search Space of Hardware / Software Embedded Systems by Means of GP. In: Genetic Programming, 17th European Conference, EuroGP 2014. Lecture Notes in Computer Science, vol. 8599. Berlin: Springer Verlag, 2014, pp. 112-123. ISBN 978-3-662-44302-6.
DetailBIDLO Michal and VAŠÍČEK Zdeněk. On Evolution of Multi-Category Pattern Classifiers Suitable for Embedded Systems. In: Genetic Programming, 17th European Conference, EuroGP 2014. Lecture Notes in Computer Science, vol. 8599. Berlin: Springer Verlag, 2014, pp. 234-245. ISBN 978-3-662-44302-6.
DetailSEKANINA Lukáš, PTÁK Ondřej and VAŠÍČEK Zdeněk. Cartesian Genetic Programming as Local Optimizer of Logic Networks. In: 2014 IEEE Congress on Evolutionary Computation. Beijing: IEEE Computational Intelligence Society, 2014, pp. 2901-2908. ISBN 978-1-4799-1488-3.
DetailHRBÁČEK Radek and SEKANINA Lukáš. Towards Highly Optimized Cartesian Genetic Programming: From Sequential via SIMD and Thread to Massive Parallel Implementation. In: GECCO '14 Proceedings of the 2014 conference on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2014, pp. 1015-1022. ISBN 978-1-4503-2662-9.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Design of Approximate Multipliers Under Different Error Metrics. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warsaw: IEEE Computer Society, 2014, pp. 135-140. ISBN 978-1-4799-4558-0.
DetailBIDLO Michal. Evolution of Computational Structures in Uniform Cellular Automata. In: 2014 IEEE Congress on Evolutionary Computation (CEC). Beijing: IEEE Computational Intelligence Society, 2014, pp. 2732-2739. ISBN 978-1-4799-1488-3.
DetailDOBAI Roland. Evolutionary On-line Synthesis of Hardware Accelerators for Software Modules in Reconfigurable Embedded Systems. In: 2014 24th International Conference on Field Programmable Logic and Applications (FPL). Munich: Institute of Electrical and Electronics Engineers, 2014, pp. 1-6. ISBN 978-3-00-044645-0.
DetailPETRLÍK Jiří, FUČÍK Otto and SEKANINA Lukáš. Multiobjective Selection of Input Sensors for SVR Applied to Road Traffic Prediction. In: Parallel Problem Solving from Nature - PPSN XIII. Lecture Notes in Computer Science, vol. 8672. Heidelberg: Springer Verlag, 2014, pp. 802-811. ISBN 978-3-319-10761-5.
DetailHRBÁČEK Radek and DVOŘÁK Václav. Bent Function Synthesis by Means of Cartesian Genetic Programming. In: Parallel Problem Solving from Nature - PPSN XIII. Heidelberg: Springer Verlag, 2014, pp. 414-423. ISBN 978-3-319-10761-5.
DetailSEKANINA Lukáš and VAŠÍČEK Zdeněk. On Evolutionary Approximation of Logic Circuits. Computing with New Resources. Berlin: Springer Verlag, 2014, pp. 367-378. ISBN 978-3-319-13349-2.
DetailDOBAI Roland, GLETTE Kyrre, TORRESEN Jim and SEKANINA Lukáš. Evolutionary Digital Circuit Design with Fast Candidate Solution Establishment in Field Programmable Gate Arrays. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 85-92. ISBN 978-1-4799-4480-4.
DetailDRAHOŠOVÁ Michaela, KOMJÁTHY Gergely and SEKANINA Lukáš. Towards Compositional Coevolution in Evolutionary Circuit Design. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 157-164. ISBN 978-1-4799-4479-8.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. How to Evolve Complex Combinational Circuits From Scratch?. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 133-140. ISBN 978-1-4799-4480-4.
DetailPETRLÍK Jiří, FUČÍK Otto and SEKANINA Lukáš. Multiobjective Selection of Input Sensors for Travel Times Forecasting Using Support Vector Regression. In: 2014 IEEE Symposium on Computational Intelligence in Vehicles and Transportation Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 14-21. ISBN 978-1-4799-4498-9.
DetailHRBÁČEK Radek. Bent Functions Synthesis on Xeon Phi Coprocessor. In: Mathematical and Engineering Methods in Computer Science. Lecture Notes in Computer Science, vol. 8934. Heidelberg: Springer Verlag, 2014, pp. 88-99. ISBN 978-3-319-14895-3.
DetailMRÁZEK Vojtěch. Akcelerace evolučního návrhu digitálních obvodů na úrovni tranzistorů s využitím platformy Zynq. In: Proceedings of the 20th Student Conference, EEICT 2014. Volume 2. Brno: Brno University of Technology, 2014, pp. 229-231. ISBN 978-80-214-4923-7.
DetailMRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Acceleration of Transistor-Level Evolution using Xilinx Zynq Platform. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 9-16. ISBN 978-1-4799-4480-4.
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2013
VAŠÍČEK Zdeněk, BIDLO Michal and SEKANINA Lukáš. Evolution of efficient real-time non-linear image filters for FPGAs. Soft Computing, vol. 17, no. 11, 2013, pp. 2163-2180. ISSN 1432-7643.
DetailSALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, RIESGO Teresa and SEKANINA Lukáš. Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing. IEEE Transactions on Computers, vol. 62, no. 8, 2013, pp. 1481-1493. ISSN 0018-9340.
DetailSEKANINA Lukáš. Ubiquity symposium: Evolutionary computation and the processes of life: evolutionary computation in physical world. Ubiquity, vol. 2013, no. 2, pp. 1-7. ISSN 1530-2180.
DetailSEKANINA Lukáš, RŮŽIČKA Richard, VAŠÍČEK Zdeněk, ŠIMEK Václav and HANÁČEK Petr. Implementing a Unique Chip ID on a Reconfigurable Polymorphic Circuit. Information Technology And Control, vol. 42, no. 1, 2013, pp. 7-14. ISSN 1392-124X.
DetailDOBAI Roland and SEKANINA Lukáš. Towards Evolvable Systems Based on the Xilinx Zynq Platform. In: 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapur: IEEE Computational Intelligence Society, 2013, pp. 89-95. ISBN 978-1-4673-5869-9.
DetailMINAŘÍK Miloš and SEKANINA Lukáš. Concurrent Evolution of Hardware and Software for Application-Specific Microprogrammed Systems. In: 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapur: IEEE Computational Intelligence Society, 2013, pp. 43-50. ISBN 978-1-4673-5869-9.
DetailKORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Advanced Approach to Calibration of Traffic Microsimulation Models using Travel Times. Journal of Cellular Automata, vol. 8, no. 6, 2013, pp. 457-467. ISSN 1557-5969.
DetailBIDLO Michal and VAŠÍČEK Zdeněk. Functional-Level Development of Image Filters by Means of Cellular Automata. In: 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapore: IEEE Computer Society, 2013, pp. 29-36. ISBN 978-1-4673-5847-7.
DetailDOBAI Roland and SEKANINA Lukáš. Image Filter Evolution on the Xilinx Zynq Platform. In: Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems. Torino: IEEE Circuits and Systems Society, 2013, pp. 164-171. ISBN 978-1-4673-6381-5.
DetailBIDLO Michal and VAŠÍČEK Zdeněk. Evolution of Cellular Automata with Conditionally Matching Rules. In: 2013 IEEE Congress on Evolutionary Computation (CEC 2013). Cancún: IEEE Computer Society, 2013, pp. 1178-1185. ISBN 978-1-4799-0452-5.
DetailHRBÁČEK Radek and DRAHOŠOVÁ Michaela. Coevolutionary Cartesian Genetic Programming in FPGA. In: Advances in Artificial Life, ECAL 2013, Proceedings of the Twelfth European Conference on the Synthesis and Simulation of Living Systems. Cambridge: MIT Press, 2013, pp. 431-438. ISBN 978-0-262-31709-2.
DetailŠIMEK Václav and RŮŽIČKA Richard. More Complex Polymorphic Circuits and Their Physical Implementation. In: Proceedings of the 20th Electronic Devices and Systems IMAPS CS International Conference. Brno: Brno University of Technology, 2013, pp. 189-194. ISBN 978-80-214-4754-7.
DetailDRAHOŠOVÁ Michaela. Koevoluční algoritmus v kartézském genetickém programování. In: Počítačové architektury a diagnostika PAD 2013. Plzeň: University of West Bohemia in Pilsen, 2013, pp. 123-128. ISBN 978-80-261-0270-0.
DetailHRBÁČEK Radek. Hardware Platform for Coevolutionary Design. In: Proceedings of the 19th Conference STUDENT EEICT 2013 Volume 2. Brno: Ing. Vladislav Pokorný - Litera, 2013, pp. 279-281. ISBN 978-80-214-4694-6.
DetailBRÁZDOVÁ Marie, MARTÍNEK Tomáš and LEXA Matej. In silico search for secondary structures in p53 target genes using R/Bioconductor. In: ITAT 2013: Information Technologies - Applications and Theory. Donovaly: CreativeSpace Independent Publishing Platform, 2013, pp. 42-46. ISBN 978-1-4909-5208-6.
DetailRŮŽIČKA Richard and ŠIMEK Václav. More Complex Polymorphic Circuits: A Way to Implementation of Smart Dependable Systems. ElectroScope, vol. 7, no. 5, 2013, pp. 1-6. ISSN 1802-4564.
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2012
SEKANINA Lukáš and SALAJKA Vojtěch. Towards New Applications of Multi-Function Logic: Image Multi-Filtering. In: Proc. of the 2012 Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2012, pp. 824-827. ISBN 978-1-4577-2145-8.
DetailSEKANINA Lukáš and VAŠÍČEK Zdeněk. A SAT-based Fitness Function for Evolutionary Optimization of Polymorphic Circuits. In: Proc. of the 2012 Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2012, pp. 715-720. ISBN 978-1-4577-2145-8.
DetailDRAHOŠOVÁ Michaela and SEKANINA Lukáš. Coevolution in Cartesian Genetic Programming. In: Proc. of the 15th European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 7244. Heidelberg: Springer Verlag, 2012, pp. 182-193. ISBN 978-3-642-29138-8.
DetailSEKANINA Lukáš, SALAJKA Vojtěch and VAŠÍČEK Zdeněk. Two-Step Evolution of Polymorphic Circuits for Image Multi-Filtering. In: 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012, pp. 432-439. ISBN 978-1-4673-1508-1.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. On Area Minimization of Complex Combinational Circuits Using Cartesian Genetic Programming. In: 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012, pp. 2379-2386. ISBN 978-1-4673-1508-1.
DetailBIDLO Michal and VAŠÍČEK Zdeněk. Evolution of Cellular Automata Using Instruction-Based Approach. In: 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012, pp. 1060-1067. ISBN 978-1-4673-1508-1.
DetailSMOLKA Tobiáš, ŠVENDA Petr, SEKANINA Lukáš and MATYÁŠ Václav. Evolutionary Design of Message Efficient Secrecy Amplification Protocols. In: Proc. of the 15th European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 7244. Heidelberg: Springer Verlag, 2012, pp. 194-205. ISBN 978-3-642-29138-8.
DetailKORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Evolutionary approach to calibration of cellular automaton based traffic simulation model. In: Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems. Anchorage: IEEE Intelligent Transportation Systems Society, 2012, pp. 122-129. ISBN 978-1-4673-3062-6.
DetailPETRLÍK Jiří, KORČEK Pavol, FUČÍK Otto, BESZÉDEŠ Marián and SEKANINA Lukáš. Estimation of traffic density map using evolutionary algorithm. In: Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems. Anchorage: IEEE Intelligent Transportation Systems Society, 2012, pp. 632-637. ISBN 978-1-4673-3062-6.
DetailSALVADOR Ruben, VIDAL Alberto, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling. Microprocessors and Microsystems, vol. 36, no. 5, 2012, pp. 427-438. ISSN 0141-9331.
DetailDRAHOŠOVÁ Michaela and SEKANINA Lukáš. Acceleration of Evolutionary Image Filter Design Using Coevolution in Cartesian GP. Lecture Notes in Computer Science, vol. 2012, no. 7491, pp. 163-172. ISBN 978-3-642-32936-4. ISSN 0302-9743.
DetailKORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Calibrating Traffic Simulation Model using Vehicle Travel Times. Lecture Notes in Computer Science, vol. 2012, no. 7495, pp. 807-816. ISSN 0302-9743.
DetailSALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, RIESGO Teresa and SEKANINA Lukáš. Implementation Techniques for Evolvable HW Systems: Virtual vs. Dynamic Reconfiguration. In: Proc. of the 22nd International Conference on Field Programmable Logic and Applications (FPL). Oslo: IEEE Computer Society, 2012, pp. 547-550. ISBN 978-1-4673-2257-7.
DetailBIDLO Michal and VAŠÍČEK Zdeněk. Cellular Automaton as a Sorting Network Generator Using Instruction-Based Development. Lecture Notes in Computer Science, vol. 2012, no. 7495, pp. 214-223. ISSN 0302-9743.
DetailRŮŽIČKA Richard and ŠIMEK Václav. NAND/NOR Gate Polymorphism in Low Temperature Environment. In: Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Tallinn: Institute of Electrical and Electronics Engineers, 2012, pp. 34-37. ISBN 978-1-4673-1185-4.
DetailPETRLÍK Jiří and SEKANINA Lukáš. Multiobjective Evolution of Multiple-Constant Multipliers. In: Proceedings of the 18th International Conference on Soft Computing (MENDEL2012). Brno: Faculty of Mechanical Engineering BUT, 2012, pp. 64-69. ISBN 978-80-214-4540-6.
DetailVAŠÍČEK Zdeněk and SLANÝ Karel. Efficient Phenotype Evaluation in Cartesian Genetic Programming. In: Proc. of the 15th European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 7244. Heidelberg: Springer Verlag, 2012, pp. 266-278. ISBN 978-3-642-29138-8.
DetailSEKANINA Lukáš. Evolvable hardware. Handbook of Natural Computing. Berlin: Springer Verlag, 2012, pp. 1657-1705. ISBN 978-3-540-92909-3.
DetailDRAHOŠOVÁ Michaela and SEKANINA Lukáš. Acceleration of Evolutionary Image Filter Design Using Coevolution in Cartesian GP. 8th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2012. ISBN 978-80-87342-15-2.
DetailRŮŽIČKA Richard and ŠIMEK Václav. Polymeric Polymorphic Electronics: Towards Multifunctional Logic Elements Based on Organic Semiconductor Materials. In: Proceedings of CSE 2012 International Scientific Conference on Computer Science and Engineerig. Košice: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 2012, pp. 154-161. ISBN 978-80-8143-049-7.
DetailŽALOUDEK Luděk and SEKANINA Lukáš. Cellular automata-based systems with fault-tolerance. Natural Computing, vol. 11, no. 4, 2012, pp. 673-685. ISSN 1567-7818.
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2011
SALVADOR Ruben, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems. EURASIP Journal on Advances in Signal Processing, vol. 2011, no. 2011, pp. 1-20. ISSN 1687-6172.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. A Global Postsynthesis Optimization Method for Combinational Circuits. In: Proc. of the Design, Automation and Test in Europe DATE 2011. Grenoble: European Design and Automation Association, 2011, pp. 1525-1528. ISBN 978-3-9810801-7-9.
DetailKORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. A Scalable Cellular Automata Based Microscopic Traffic Simulation. In: Proceedings of the IEEE Intelligent Vehicles Symposium 2011 (IV11). Baden-Baden: IEEE Intelligent Transportation Systems Society, 2011, pp. 13-18. ISBN 978-1-4577-0889-3.
DetailKORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Cellular automata based traffic simulation accelerated on GPU. In: Proceedings of the 17th International Conference on Soft Computing (MENDEL2011). Brno: Institute of Automation and Computer Science FME BUT, 2011, pp. 395-402. ISBN 978-80-214-4302-0.
DetailRŮŽIČKA Richard, ŠIMEK Václav and SEKANINA Lukáš. Behavior of CMOS Polymorphic Circuits in High Temperature Environment. In: Proceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Cottbus: IEEE Computer Society, 2011, pp. 447-452. ISBN 978-1-4244-9753-9.
DetailKORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. Microscopic traffic simulation using CUDA. In: Advanced Computer Architecture and Compilation for High-Performace and Embedded Systems (ACACES 2011) Poster Abstracts. Fiuggi: Academia Press, 2011, pp. 207-210. ISBN 978-90-382-1798-7.
DetailGAJDA Zbyšek and SEKANINA Lukáš. On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits. Journal of Multiple-Valued Logic and Soft Computing, vol. 17, no. 6, 2011, pp. 607-631. ISSN 1542-3980.
DetailKORČEK Pavol. Simulácie dopravy pre dlhodobú predpoveď stavu dopravy. In: Počítačové architektury a diagnostika 2011. Bratislava: Faculty of Informatics and Information Technology Slovak University of Technology in Bratislava, 2011, pp. 115-120. ISBN 978-80-227-3552-0.
DetailMINAŘÍK Miloš and SEKANINA Lukáš. Evolution of Iterative Formulas Using Cartesian Genetic Programming. Lecture Notes in Computer Science, vol. 2011, no. 6881, pp. 11-20. ISSN 0302-9743.
DetailSEKANINA Lukáš. Evolutionary hardware design (Invited Paper). In: VLSI Circuits and Systems V. Proc. of SPIE Vol. 8067. Bellingham: SPIE - the international society for optics and photonics, 2011, pp. 1-11. ISBN 978-0-8194-8656-1.
DetailSALVADOR Ruben, VIDAL Alberto, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Bio-inspired FPGA architecture for self-calibration of an image compression core based on wavelet transforms in embedded systems. In: VLSI Circuits and Systems V. Proc. of SPIE Vol. 8067. Bellingham: SPIE - the international society for optics and photonics, 2011, pp. 1-13. ISBN 978-0-8194-8656-1.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Extensions of Cartesian Genetic Programming for Optimization of Complex Combinational Circuits. In: Proc. of the 20th International Workshop on Logic and Synthesis. San Diego: University of California San Diego, 2011, pp. 55-61.
DetailVAŠÍČEK Zdeněk, BIDLO Michal, SEKANINA Lukáš and GLETTE Kyrre. Evolutionary Design of Efficient and Robust Switching Image Filters. In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011, pp. 192-199. ISBN 978-1-4577-0599-1.
DetailOTERO Andres, SALVADOR Ruben, MORA Javier, DE la Torre Eduardo, RIESGO Teresa and SEKANINA Lukáš. A Fast Reconfigurable 2D HW Core Architecture on FPGAs for Evolvable Self-Adaptive Systems. In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011, pp. 336-343. ISBN 978-1-4577-0599-1.
DetailSALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, RIESGO Teresa and SEKANINA Lukáš. Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support. In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011, pp. 184-191. ISBN 978-1-4577-0599-1.
DetailKORČEK Pavol, SEKANINA Lukáš and FUČÍK Otto. A Scalable Cellular Automata Based Microscopic Traffic Simulation. 7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2011. ISBN 978-80-214-4305-1.
DetailRŮŽIČKA Richard and ŠIMEK Václav. On Properties of Basic Building Blocks for Printable Polymer and Nanometal Logic. In: Proc. of IMAPS CS International Conference on Electronic Devices and Systems. Brno: Brno University of Technology, 2011, pp. 258-263. ISBN 978-80-214-4303-7.
DetailSEKANINA Lukáš. Evolution of digital circuits. In: Proceedings of the 2011 GECCO conference companion on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2011, pp. 1343-1359. ISBN 978-1-4503-0690-4.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware. Genetic Programming and Evolvable Machines, vol. 12, no. 3, 2011, pp. 305-327. ISSN 1389-2576.
DetailRŮŽIČKA Richard and ŠIMEK Václav. Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles. In: Proceedings of 14th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society Press, 2011, pp. 205-212. ISBN 978-0-7695-4494-6.
DetailSEKANINA Lukáš and VAŠÍČEK Zdeněk. CGP Acceleration Using Field-Programmable Gate Arrays. Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011, pp. 217-230. ISBN 978-3-642-17309-7.
DetailSEKANINA Lukáš, HARDING Simon L., BANZHAF Wolfgang and KOWALIW Taras. Image Processing and CGP. Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011, pp. 181-215. ISBN 978-3-642-17309-7.
DetailSEKANINA Lukáš, WALKER James A., KAUFMANN Paul and PLATZNER Marco. Evolution of Electronic Circuits. Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011, pp. 125-179. ISBN 978-3-642-17309-7.
DetailVAŠÍČEK Zdeněk and BIDLO Michal. Evolutionary Design of Robust Noise-Specific Image Filters. In: 2011 IEEE Congress on Evolutionary Computation. New Orleans: IEEE Computer Society, 2011, pp. 269-276. ISBN 978-1-4244-7834-7.
DetailSEKANINA Lukáš and KOMENDA Tomáš. Global Control in Polymorphic Cellular Automata. Journal of Cellular Automata, vol. 6, no. 4, 2011, pp. 301-321. ISSN 1557-5969.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Optimization of Complex Digital Circuits. In: 7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2011, p. 1. ISBN 978-80-214-4305-1.
DetailSALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, SEKANINA Lukáš and RIESGO Teresa. Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems. In: Proc. of the 2011 International Conference on ReConFigurable Computing and FPGAs. Los Alamitos: IEEE Computer Society, 2011, pp. 164-169. ISBN 978-0-7695-4551-6.
DetailGAJDA Zbyšek and SEKANINA Lukáš. Recent Advances in Evolutionary Synthesis and Optimization of Ordinary and Polymorphic Circuits. Brno: Faculty of Information Technology BUT, 2011. ISBN 978-80-214-4417-1.
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2010
SEKANINA Lukáš. Evoluční návrh elektronických obvodů. Automa, vol. 2010, no. 1, pp. 48-51. ISSN 1210-9592.
DetailVAŠÍČEK Zdeněk, SEKANINA Lukáš and BIDLO Michal. A Method for Design of Impulse Bursts Noise Filters Optimized for FPGA Implementations. In: DATE 2010: Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2010, pp. 1731-1736. ISBN 978-3-9810801-6-2.
DetailSEKANINA Lukáš. Evolutionary Circuit Design: Tutorial. In: Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010, pp. 5-5. ISBN 978-1-4244-6610-8.
DetailFIŠER Petr, SCHMIDT Jan, VAŠÍČEK Zdeněk and SEKANINA Lukáš. On Logic Synthesis of Conventionally Hard to Synthesize Circuits Using Genetic Programming. In: Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010, pp. 346-351. ISBN 978-1-4244-6610-8.
DetailŠIMEK Václav, RŮŽIČKA Richard and SEKANINA Lukáš. On Analysis of Fabricated Polymorphic Circuits. In: Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010, pp. 281-284. ISBN 978-1-4244-6610-8.
DetailSEKANINA Lukáš. Evoluční návrh hardware. Umelá inteligencia a kognitívna veda II. Edícia výskumných textov FIIT STU. Bratislava: Vydavateľstvo STU, 2010, pp. 437-465. ISBN 978-80-227-3284-0.
DetailSALVADOR Ruben, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems. In: Proc. of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2010, pp. 177-184. ISBN 978-1-4244-5888-2.
DetailBIDLO Michal and SEKANINA Lukáš. On Impact of Environment on the Complexity Generated by Evolutionary Development. In: MENDEL 2010 - 16th International Conference on Soft Computing. Brno: Faculty of Mechanical Engineering BUT, 2010, pp. 501-508. ISBN 978-80-214-4120-0.
DetailGAJDA Zbyšek and SEKANINA Lukáš. When Does Cartesian Genetic Programming Minimize the Phenotype Size Implicitly?. In: Proceeding of Genetic and Evolutionary Computation Conference, GECCO 2010. New York: Association for Computing Machinery, 2010, pp. 983-984. ISBN 978-1-4503-0072-8.
DetailBIDLO Michal, SLANÝ Karel and VAŠÍČEK Zdeněk. Sorting Network Development Using Cellular Automata. In: Evolvable Systems: From Biology to Hardware. 9th International Conference, ICES 2010, York, UK, September 6-8, 2010, Proceedings, LNCS 6274. London: Springer London, 2010, pp. 85-96. ISBN 978-3-642-15322-8.
DetailGAJDA Zbyšek and SEKANINA Lukáš. An Efficient Selection Strategy for Digital Circuit Evolution. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 6274. Berlin: Springer Verlag, 2010, pp. 13-24. ISBN 978-3-642-15322-8.
DetailŠIMÁČEK Jiří, SEKANINA Lukáš and STAREČEK Lukáš. Evolutionary Design of Reconfiguration Strategies to Reduce the Test Application Time. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 6274. Berlin: Springer Verlag, 2010, pp. 214-225. ISBN 978-3-642-15322-8.
DetailRŮŽIČKA Richard. Gracefully Degrading Circuit Controllers Based on Polytronics. In: Proc. of 13th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2010, pp. 809-812. ISBN 978-0-7695-4171-6.
DetailŽALOUDEK Luděk, SEKANINA Lukáš and ŠIMEK Václav. Accelerating Cellular Automata Evolution on Graphics Processing Units. International Journal on Advances in Software, vol. 3, no. 1, 2010, pp. 294-303. ISSN 1942-2628.
DetailSALVADOR Ruben, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs. In: Proc. of 13th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2010, pp. 96-103. ISBN 978-0-7695-4171-6.
DetailSALVADOR Ruben, MORENO Felix, RIESGO Teresa and SEKANINA Lukáš. Implementation of bio-inspired adaptive wavelet transforms in FPGAs. Modelling, validation and profiling of the algorithm. In: Proceedings of the XXV Conference on Design of Circuits and Integrated Systems. Lanzarote: The Universidad de Las Palmas de Gran Canaria, 2010, pp. 210-215. ISBN 978-84-693-7393-4.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Hardware Accelerator of Cartesian Genetic Programming with Multiple Fitness Units. Computing and Informatics, vol. 29, no. 6, 2010, pp. 1359-1371. ISSN 1335-9150.
DetailBIDLO Michal. Evolutionary Design of Generic Structures Using Instruction-Based Development. Brno: Faculty of Information Technology BUT, 2010. ISBN 978-80-214-4210-8.
DetailKOTÁSEK Zdeněk, BIDLO Michal and JAROŠ Jiří, ed. Počítačové architektury a diagnostika. Brno: Faculty of Information Technology BUT, 2010. ISBN 978-80-214-4140-8.
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2009
ŽALOUDEK Luděk, SEKANINA Lukáš and ŠIMEK Václav. GPU Accelerators for Evolvable Cellular Automata. In: Computation World: Future Computing, Service Computation, Adaptive, Content, Cognitive, Patterns. Athens: Institute of Electrical and Electronics Engineers, 2009, pp. 533-537. ISBN 978-0-7695-3862-4.
DetailŠVENDA Petr, SEKANINA Lukáš and MATYÁŠ Václav. Evolutionary Design of Secrecy Amplification Protocols for Wireless Sensor Networks. In: Proc. of the ACM Conference on Wireless Network Security. New York: Association for Computing Machinery, 2009, pp. 225-236. ISBN 978-1-60558-460-7.
DetailSEKANINA Lukáš, RŮŽIČKA Richard, VAŠÍČEK Zdeněk, PROKOP Roman and FUJCIK Lukáš. REPOMO32 - New Reconfigurable Polymorphic Integrated Circuit for Adaptive Hardware. In: Proc. of the 2009 IEEE Symposium Series on Computational Intelligence - Workshop on Evolvable and Adaptive Hardware. Nashville: IEEE Computational Intelligence Society, 2009, pp. 39-46. ISBN 978-1-4244-2755-0.
DetailSLANÝ Karel. Comparison of CGP and Age-Layered CGP Performance in Image Operator Evolution. In: Genetic Programming, 12th European Conference, EuroGP 2009. Lecture Notes in Computer Science, vol. 5481. Tübingen: Springer Verlag, 2009, pp. 351-361. ISBN 978-3-642-01180-1. ISSN 0302-9743.
DetailGAJDA Zbyšek and SEKANINA Lukáš. Gate-Level Optimization of Polymorphic Circuits Using Cartesian Genetic Programming. In: Proc. of 2009 IEEE Congress on Evolutionary Computation. NA: IEEE Computational Intelligence Society, 2009, pp. 1599-1604. ISBN 978-1-4244-2958-5.
DetailBIDLO Michal and VAŠÍČEK Zdeněk. Investigating Gate-Level Evolutionary Development of Combinational Multipliers Using Enhanced Cellular Automata-Based Model. In: Proc. of 2009 IEEE Congress on Evolutionary Computation. NA: IEEE Computational Intelligence Society, 2009, pp. 2241-2248. ISBN 978-1-4244-2958-5.
DetailNEGOITA Mircea, SEKANINA Lukáš and STOICA Adrian. Adaptive and evolvable hardware and systems: the state of the art and the prospectus for future development. Journal of Automation, Mobile Robotics and Intelligent Systems, vol. 3, no. 2, 2009, pp. 70-75. ISSN 1897-8649.
DetailSEKANINA Lukáš, RŮŽIČKA Richard and GAJDA Zbyšek. Polymorphic FIR Filters with Backup Mode Enabling Power Savings. In: Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2009, pp. 43-50. ISBN 978-0-7695-3714-6.
DetailVAŠÍČEK Zdeněk, BIDLO Michal, SEKANINA Lukáš, TORRESEN Jim, GLETTE Kyrre and FURUHOLMEN Marcus. Evolution of Impulse Bursts Noise Filters. In: Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2009, pp. 27-34. ISBN 978-0-7695-3714-6.
DetailSEKANINA Lukáš. Evolvable Hardware: From Applications to Implications for the Theory of Computation. In: Proc. of the 8th Int. Conference on Unconventional Computation. Lecture Notes in Computer Science, vol. 5715. Berlin: Springer Verlag, 2009, pp. 24-36. ISBN 978-3-642-03744-3.
DetailSLANÝ Karel. Towards the Automatic Evolutionary Prediction of the FOREX Market Behaviour. In: Proceedings of the 2009 International Conference on Adaptive and Intelligent Systems. Klagenfurt: IEEE Computer Society, 2009, pp. 141-145. ISBN 978-0-7695-3827-3.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Efficient Hardware Accelerator for Symbolic Regression Problems. In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Znojmo: Masaryk University, 2009, pp. 192-199. ISBN 978-80-87342-04-6.
DetailSEKANINA Lukáš, VAŠÍČEK Zdeněk, RŮŽIČKA Richard, BIDLO Michal, JAROŠ Jiří and ŠVENDA Petr. Evoluční hardware: Od automatického generování patentovatelných invencí k sebemodifikujícím se strojům. Edice Gerstner. Praha: Academia, 2009. ISBN 978-80-200-1729-1.
DetailGAJDA Zbyšek. Návrh a optimalizace polymorfních obvodů. In: Počítačová architektura a Diagnostika 2009. Zlín: Tomas Bata University in Zlín, 2009, pp. 63-67. ISBN 978-80-7318-847-4.
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2008
SEKANINA Lukáš, STAREČEK Lukáš, KOTÁSEK Zdeněk and GAJDA Zbyšek. Polymorphic Gates in Design and Test of Digital Circuits. International Journal of Unconventional Computing, vol. 4, no. 2, 2008, pp. 125-142. ISSN 1548-7199.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Hardware Accelerators for Cartesian Genetic Programming. In: Eleventh European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 4971. Berlin: Springer Verlag, 2008, pp. 230-241. ISBN 978-3-540-78670-2.
DetailSEKANINA Lukáš and MIKUŠEK Petr. Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures. In: Applications of Evolutionary Computing. Lecture Notes in Computer Science, vol. 4974. Berlin: Springer Verlag, 2008, pp. 144-153. ISBN 978-3-540-78760-0.
DetailSTAREČEK Lukáš, SEKANINA Lukáš and KOTÁSEK Zdeněk. Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration. In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Bratislava: IEEE Computer Society, 2008, pp. 255-258. ISBN 978-1-4244-2276-0.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Novel Hardware Implementation of Adaptive Median Filters. In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Bratislava: IEEE Computer Society, 2008, pp. 110-115. ISBN 978-1-4244-2276-0.
DetailRŮŽIČKA Richard. On Bifunctional Polymorphic Gates Controlled by a Special Signal. WSEAS Transactions on Circuits, vol. 7, no. 3, 2008, pp. 96-101. ISSN 1109-2734.
DetailVAŠÍČEK Zdeněk, ČAPKA Ladislav and SEKANINA Lukáš. Analysis of Reconfiguration Options for a Reconfigurable Polymorphic Circuit. In: Proc. of the 2008 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2008, pp. 3-10. ISBN 978-0-7695-3166-3.
DetailRŮŽIČKA Richard, SEKANINA Lukáš and PROKOP Roman. Physical Demonstration of Polymorphic Self-checking Circuits. In: Proc. of the 14th IEEE Int. On-Line Testing Symposium. Los Alamitos: IEEE Computer Society, 2008, pp. 31-36. ISBN 978-0-7695-3264-6.
DetailPEČENKA Tomáš, SEKANINA Lukáš and KOTÁSEK Zdeněk. Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability. ACM Transactions on Design Automation of Electronic Systems, vol. 13, no. 3, 2008, pp. 1-21. ISSN 1084-4309.
DetailBIDLO Michal and VAŠÍČEK Zdeněk. Gate-Level Evolutionary Development Using Cellular Automata. In: 2008 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society Press, 2008, pp. 11-18. ISBN 978-0-7695-3166-3.
DetailBIDLO Michal and VAŠÍČEK Zdeněk. Cellular Automata-Based Development of Combinational and Polymorphic Circuits: A Comparative Study. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 5216. Berlin: Springer Verlag, 2008, pp. 106-117. ISBN 978-3-540-85856-0.
DetailVAŠÍČEK Zdeněk, ŽÁDNÍK Martin, SEKANINA Lukáš and TOBOLA Jiří. On Evolutionary Synthesis of Linear Transforms. In: Evolvable Systems: From Biology > to > Hardware. Lecture Notes in Computer Science, vol. 5216. Berlin: Springer Verlag, 2008, pp. 141-152. ISBN 978-3-540-85856-0.
DetailŽALOUDEK Luděk and SEKANINA Lukáš. Transistor-level Evolution of Digital Circuits Using a Special Circuit Simulator. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 5216. Berlin: Springer Verlag, 2008, pp. 320-331. ISBN 978-3-540-85856-0.
DetailSLANÝ Karel. Branch Predictor On-line Evolutionary System. In: 2008 Genetic and Evolutionary Computation Conference GECCO. New York: Association for Computing Machinery, 2008, pp. 1643-1648. ISBN 978-1-60558-131-6.
DetailHORNBY Gregory S., SEKANINA Lukáš and HADDOW Pauline C., ed. Proceedings of Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 5216. Berlin: Springer Verlag, 2008. ISBN 978-3-540-85856-0.
DetailNEGOITA Mircea, SEKANINA Lukáš and STOICA Adrian. Adaptive and Evolvable Hardware and Systems: The State of the Art and the Prospectus for Future Development. In: Knowledge-Based Intelligent Information and Engineering Systems. Lecture Notes in Computer Science, vol. 5179. Berlin: Springer Verlag, 2008, pp. 310-318. ISBN 978-3-540-85566-8.
DetailGAJDA Zbyšek. Návrh polymorfních obvodů. In: Počítačové architektury a diagnostika 2008. Liberec: Liberec University of Technology, 2008, pp. 17-23. ISBN 978-80-7372-378-1.
DetailSLANÝ Karel. Evoluční adaptace prediktorů v reálném čase. In: Počítačové architektury a diagnostika 2008. Liberec: Liberec University of Technology, 2008, pp. 89-95. ISBN 978-80-7372-378-1.
DetailGAJDA Zbyšek. Polymorphic Circuit Design. MEMICS 2008 - Fourth Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2008. ISBN 978-80-7355-082-0.
DetailBIDLO Michal and ŠKARVADA Jaroslav. Instruction-based development: From evolution to generic structures of digital circuits. International Journal of Knowledge-Based and Intelligent Engineering Systems, vol. 12, no. 3, 2008, pp. 221-236. ISSN 1327-2314.
DetailVAŠÍČEK Zdeněk. Adaptivní hardware na bázi vyvíjejících se obvodů. In: Počítačové architektury a diagnostika 2008. Česko-slovenský seminář pro studenty doktorandského studia. Liberec: Liberec University of Technology, 2008, pp. 119-124. ISBN 978-80-7372-378-1.
DetailVAŠÍČEK Zdeněk. Towards Automatic Design of Competitive Image Filters in FPGAs. In: Proceedings of Junior Scientist Conference 2008. Vienna: Technical University Wien, 2008, p. 2. ISBN 978-3-200-01612-5.
DetailŽALOUDEK Luděk. Sebereplikace ve výpočetních systémech. In: Počítačové architektury a diagnostika 2008. Liberec: Liberec University of Technology, 2008, pp. 131-136. ISBN 978-80-7372-378-1.
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2007
SLANÝ Karel and SEKANINA Lukáš. Fitness Landscape Analysis and Image Filter Evolution Using Functional-Level CGP. In: Genetic Programming, 10th European Conference, EuroGP 2007. Lecture Notes in Computer Science, vol. 4445. Berlin: Springer Verlag, 2007, pp. 311-320. ISBN 978-3-540-71602-0.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. An Evolvable Hardware System in Xilinx Virtex II Pro FPGA. International Journal of Innovative Computing and Applications, vol. 1, no. 1, 2007, pp. 63-73. ISSN 1751-648X.
DetailSEKANINA Lukáš. Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates. In: 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Gliwice: IEEE Computer Society, 2007, pp. 243-246. ISBN 1424411610.
DetailSEKANINA Lukáš. Vztah mezi abstraktním a fyzickým výpočtem v kontextu evolučního návrhu. In: Kognice a umělý život VII. Opava: Silesian University, 2007, pp. 305-310. ISBN 9788072484126.
DetailGAJDA Zbyšek and SEKANINA Lukáš. Reducing the Number of Transistors in Digital Circuits Using Gate-Level Evolutionary Design. In: 2007 Genetic and Evolutionary Computation Conference. New York: Association for Computing Machinery, 2007, pp. 245-252. ISBN 9781595936974.
DetailSEKANINA Lukáš. Evolvable hardware: Tutorial. In: 2007 Genetic and Evolutionary Computational Conference. New York: Association for Computing Machinery, 2007, pp. 3627-3644. ISBN 9781595936981.
DetailSEKANINA Lukáš. Evolutionary Functional Recovery in Virtual Reconfigurable Circuits. ACM Journal on Emerging Technologies in Computing Systems, vol. 3, no. 2, 2007, pp. 1-22. ISSN 1550-4832.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Evaluation of a New Platform For Image Filter Evolution. In: Proc. of the 2007 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2007, pp. 577-584. ISBN 076952866X.
DetailBIDLO Michal. Evolutionary Development of Generic Multipliers: Initial Results. In: Proc. of the 2007 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2007, pp. 405-412. ISBN 0-7695-2866-X.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs. In: Proc. of 2007 International Conference on Field Programmable Logic and Applications. Los Alamitos: IEEE Computer Society, 2007, pp. 216-221. ISBN 1424410606.
DetailSLANÝ Karel and DVOŘÁK Václav. Evolutionary Designed Branch Predictors. In: 13th International Conference on Soft Computing. Brno: Faculty of Mechanical Engineering BUT, 2007, pp. 18-23. ISBN 978-80-214-3473-8.
DetailSEKANINA Lukáš. Evolution of Polymorphic Self-Checking Circuits. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 4684. Berlin: Springer Verlag, 2007, pp. 186-197. ISBN 978-3-540-74625-6.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Reducing the Area on a Chip Using a Bank of Evolved Filters. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 4684. Berlin: Springer Verlag, 2007, pp. 222-232. ISBN 978-3-540-74625-6.
DetailSTAREČEK Lukáš, SEKANINA Lukáš, GAJDA Zbyšek, KOTÁSEK Zdeněk, PROKOP Roman and MUSIL Vladislav. On Properties and Utilization of Some Polymorphic Gates. In: 6th Electronic Circuits and Systems Conference (ECS 2007). Bratislava: Faculty of Informatics and Information Technology Slovak University of Technology in Bratislava, 2007, pp. 77-81. ISBN 978-80-227-2697-9.
DetailSTAREČEK Lukáš. Polymorfní hradla pro optimalizaci testu obvodu. In: Sborník příspěvků Česko-slovenského semináře Počítačové architektury a diagnostika pro studenty doktorandského studia. Plzeň: University of West Bohemia in Pilsen, 2007, pp. 41-46. ISBN 978-80-7043-605-9.
DetailVAŠÍČEK Zdeněk. Reálné aplikace evolučního návrhu. In: Počítačové architektury a diagnostika 2007. Česko-slovenský seminář pro studenty doktorandského studia. Plzeň: University of West Bohemia in Pilsen, 2007, pp. 137-142. ISBN 978-80-7043-605-9.
DetailČAPKA Ladislav and VAŠÍČEK Zdeněk. Investigating the Influence of Mutation Operators in Cartesian Genetic Programming. In: 13th International Conference on Soft Computing. Brno: Faculty of Mechanical Engineering BUT, 2007, pp. 43-47. ISBN 978-80-214-3473-8.
DetailRŮŽIČKA Richard and STAREČEK Lukáš. Development of Building Blocks for Polymorphic Digital Circuits. In: Proceedings of the Work in Progress Session of 10th Euromicro DSD 2007. Linz: Johannes Kepler University Linz, 2007, pp. 33-34. ISBN 978-3-902457-16-5.
DetailGAJDA Zbyšek. Metody návrhu polymorfních obvodů. In: Sborník příspěvků Česko-slovenského semináře Počítačové architektury a diagnostika pro studenty doktorandského studia. Plzeň: University of West Bohemia in Pilsen, 2007, pp. 19-25. ISBN 978-80-7043-605-9.
DetailBIDLO Michal. Výpočetní development založený na instrukcích. In: Sborník příspěvků pracovního semináře Počítačové architektury & diagnostika. Plzeň: University of West Bohemia in Pilsen, 2007, pp. 53-59. ISBN 978-80-7043-605-9.
DetailBIDLO Michal. Biologií inspirovaný vývin jako technika evolučního návrhu. In: Kognice a umělý život VII. Opava: Silesian University, 2007, pp. 43-53. ISBN 978-80-7248-412-6.
DetailBIDLO Michal. Evolutionary Design of Generic Combinational Multipliers Using Development. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 4684. Berlin: Springer Verlag, 2007, pp. 77-88. ISBN 978-3-540-74625-6.
DetailSEKANINA Lukáš. Evolved Computing Devices and the Implementation Problem. Minds and Machines, vol. 17, no. 3, 2007, pp. 311-329. ISSN 0924-6495.
DetailRŮŽIČKA Richard. New Polymorphic NAND/XOR Gate. In: Proceedings of 7th WSEAS International Conference on Applied Computer Science. Computer Science Challenges, vol. 2007. Venice: World Scientific and Engineering Academy, 2007, pp. 192-196. ISBN 978-960-6766-15-2. ISSN 1790-5117.
DetailSEKANINA Lukáš and MARTÍNEK Tomáš. Evolving Image Operators Directly in Hardware. Genetic and Evolutionary Computation for Image Processing and Analysis. EURASIP Book Series on Signal Processing and Communications, Volume 8. New York: Hindawi Publishing Corporation, 2007, pp. 93-112. ISBN 978-977-454-001-1.
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2006
SEKANINA Lukáš and VAŠÍČEK Zdeněk. On the Practical Limits of the Evolutionary Digital Filter Design at the Gate Level. In: Applications of Evolutionary Computing. Lecture Notes in Computer Science, vol. 3907. Berlin: Springer Verlag, 2006, pp. 344-355. ISBN 978-3-540-33237-4.
DetailSEKANINA Lukáš, STAREČEK Lukáš and KOTÁSEK Zdeněk. Novel Logic Circuits Controlled by Vdd. In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Praha: IEEE Computer Society, 2006, pp. 85-86. ISBN 1424401844.
DetailGAJDA Zbyšek. A Core Generator for Multi-ALU Processors Utilized in Genetic Parallel Programming. In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Praha: IEEE Computer Society, 2006, pp. 238-240. ISBN 1424401844.
DetailSEKANINA Lukáš. On Dependability of FPGA-Based Evolvable Hardware Systems That Utilize Virtual Reconfigurable Circuits. In: Computing Frontiers 2006 Conference. New York: Association for Computing Machinery, 2006, pp. 221-228. ISBN 1595933026.
DetailSEKANINA Lukáš. Evolutionary Design of Digital Circuits: Where Are Current Limits?. In: Proc. of the 1st NASA/ESA Conference on Adaptive Hardware and Systems. Piscataway: IEEE Computer Society, 2006, pp. 171-178. ISBN 0-7695-2614-4.
DetailSEKANINA Lukáš, STAREČEK Lukáš, GAJDA Zbyšek and KOTÁSEK Zdeněk. Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage. In: Proc. of the 1st NASA/ESA Conference on Adaptive Hardware and Systems. Piscataway: IEEE Computer Society, 2006, pp. 186-193. ISBN 0-7695-2614-4.
DetailSEKANINA Lukáš. Evolutionary Approach to the Implementation Problem. Brno: Faculty of Information Technology BUT, 2006.
DetailSEKANINA Lukáš, MARTÍNEK Tomáš and GAJDA Zbyšek. Extrinsic and Intrinsic Evolution of Multifunctional Combinational Modules. In: 2006 IEEE World Congress on Computational Intelligence. CA: IEEE Computational Intelligence Society, 2006, pp. 9676-9683. ISBN 0-7803-9489-5.
DetailZEBULUM Ricardo S., KEYMEULEN Didier, RAMESHAM Rajeshuni, SEKANINA Lukáš, MAO James, KUMAR Nikhil and STOICA Adrian. Characterization and Synthesis of Circuits at Extreme Low Temperatures. Evolvable Hardware. Genetic and Evolutionary Computation. Berlin: Springer Verlag, 2006, pp. 161-172. ISBN 0-387-24386-0.
DetailBIDLO Michal. Evolutionary Design Using Development. In: Sborník příspěvků pracovního semináře Počítačové architektury & diagnostika pro studenty doktorského studia. Bratislava: Institute of Informatics, Slovak Academy of Sciences, 2006, pp. 119-124. ISBN 80-969202-2-7.
DetailBIDLO Michal. Introducing New Fundamental Classification of Development for Evolutionary Design: Theory and Applications. In: Proc. of the 9th International Conference on Parallel Problem Solving from Nature - Workshop on Evolutionary Algorithms. Reykjavík, 2006, pp. 1-12.
DetailGAJDA Zbyšek. Návrh polymorfních obvodů. In: Sborník příspěvků pracovního semináře Počítačové architektury & diagnostika pro studenty doktorského studia. Bratislava: Institute of Informatics, Slovak Academy of Sciences, 2006, pp. 55-60. ISBN 80-969202-2-7.
DetailSTAREČEK Lukáš. Modelování polymorfních hradel a obvodů. In: Sborník příspěvků Česko-slovenského semináře Počítačové architektury a diagnostika pro studenty doktorandského studia. Bratislava: Slovak Academy of Science, 2006, pp. 67-72. ISBN 80-969202-2-7.
DetailBIDLO Michal, BIDLO Radek and SEKANINA Lukáš. Designing a Novel General Sorting Network Constructor Using Artificial Evolution. TRANSACTIONS ON ENGINEERING, COMPUTING AND TECHNOLOGY, vol. 15, no. 10, 2006, pp. 85-90. ISBN 975-00803-4-3. ISSN 1305-5313.
DetailRŮŽIČKA Richard and SEKANINA Lukáš. Evolutionary Circuit Design in REPOMO - Reconfigurable Polymorphic Module. In: Proceedings of the Second IASTED International Conference on Computational Intelligence. Anaheim: ACTA Press, 2006, pp. 237-241. ISBN 0-88986-602-3.
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2005
SEKANINA Lukáš. Evoluční design poráží řešení vytvořená kreativním návrhářem. Vesmír, vol. 84, no. 1, 2005, pp. 44-46. ISSN 0042-4544.
DetailSEKANINA Lukáš. Evolutionary Design of Gate-Level Polymorphic Digital Circuits. In: Applications of Evolutionary Computation. Lecture Notes in Computer Science, vol. 3449. Berlin: Springer Verlag, 2005, pp. 185-194. ISBN 978-3-540-25396-9.
DetailSEKANINA Lukáš and BIDLO Michal. Evolutionary Design of Arbitrarily Large Sorting Networks Using Development. Genetic Programming and Evolvable Machines, vol. 6, no. 3, 2005, pp. 319-347. ISSN 1389-2576.
DetailSEKANINA Lukáš. Design Methods for Polymorphic Digital Circuits. In: Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop. Sopron: University of West Hungary, 2005, pp. 145-150. ISBN 9639364487.
DetailBIDLO Michal and SEKANINA Lukáš. Providing Information from the Environment for Growing Electronic Circuits Through Polymorphic Gates. In: Proc. of Genetic and Evolutionary Computation Conference - Workshops 2005. New York: Association for Computing Machinery, 2005, pp. 242-248. ISBN 1-59593-097-3.
DetailPEČENKA Tomáš, KOTÁSEK Zdeněk, SEKANINA Lukáš and STRNADEL Josef. Automatic Discovery of RTL Benchmark Circuits with Predefined Testability Properties. In: Proc. of the 2005 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2005, pp. 51-58. ISBN 0-7695-2399-4.
DetailSEKANINA Lukáš and ZEBULUM Ricardo S. Evolutionary discovering of the concept of the discrete state at the transistor level. In: Proc. of the 2005 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2005, pp. 73-78. ISBN 0-7695-2399-4.
DetailMARTÍNEK Tomáš and SEKANINA Lukáš. An Evolvable Image Filter: Experimental Evaluation of a Complete Hardware Implementation in FPGA. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Berlin: Springer Verlag, 2005, pp. 76-85. ISBN 978-3-540-28736-0.
DetailKOŘENEK Jan and SEKANINA Lukáš. Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Berlin: Springer Verlag, 2005, pp. 46-55. ISBN 978-3-540-28736-0.
DetailZEBULUM Ricardo S., STOICA Adrian, KEYMEULEN Didier and SEKANINA Lukáš. Evolvable Hardware System at Extreme Low Temperatures. In: Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Berlin: Springer Verlag, 2005, pp. 37-45. ISBN 978-3-540-28736-0.
DetailSEKANINA Lukáš and ZEBULUM Ricardo S. Intrinsic Evolution of Controllable Oscillators in FPTA-2. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2005, pp. 98-107. ISBN 978-3-540-28736-0.
DetailBIDLO Michal. Vývojové modely pro evoluční návrh logických obvodů. Brno: Department of Computer Systems FIT BUT, 2005.
DetailBIDLO Michal. Generování grafů celulárními automaty. Brno: Department of Computer Systems FIT BUT, 2005.
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2004
SEKANINA Lukáš. Evolving Constructors for Infinitely Growing Sorting Networks and Medians. Lecture Notes in Computer Science, vol. 2004, no. 2932, pp. 314-323. ISSN 0302-9743.
DetailSEKANINA Lukáš. Evolutionary Design Space Exploration for Median Circuits. Lecture Notes in Computer Science, vol. 2004, no. 3005, pp. 240-249. ISSN 0302-9743.
DetailFRIEDL Štěpán and SEKANINA Lukáš. The First Circuits Evolved in a Physical Virtual Reconfigurable Device. In: Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Bratislava: Slovak Academy of Science, 2004, pp. 35-42. ISBN 80-969117-9-1.
DetailSEKANINA Lukáš and DRÁBEK Vladimír. Theory and Applications of Evolvable Embedded Systems. In: Proc. of the 11th IEEE Int. Conference and Workshop on the Engineering of Computer-Based Systems. Los Alamitos, CA: IEEE Computer Society Press, 2004, pp. 186-193. ISBN 0-7695-2125-8.
DetailSEKANINA Lukáš and FRIEDL Štěpán. On Routine Implementation of Virtual Evolvable Devices Using COMBO6. In: Proc. of the 2004 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2004, pp. 63-70. ISBN 0-7695-2145-2.
DetailSEKANINA Lukáš. Evolvable computing by means of evolvable components. Natural Computing, vol. 3, no. 3, 2004, pp. 323-355. ISSN 15677818.
DetailVAŠÍČEK Zdeněk and SEKANINA Lukáš. Evoluční návrh kombinačních obvodů. Elektrorevue - www.elektrorevue.cz, vol. 2004, no. 43, pp. 1-6. ISSN 1213-1539.
DetailTORRESEN Jim, BAKKE Jorgen W. and SEKANINA Lukáš. Recognizing Speed Limit Sign Numbers by Evolvable Hardware. Lecture Notes in Computer Science, vol. 2004, no. 3242, pp. 682-691. ISSN 0302-9743.
DetailTORRESEN Jim, BAKKE Jorgen W. and SEKANINA Lukáš. Efficient Recognition of Speed Limit Signs. In: Proc. of the 7th International IEEE Conference on Intelligent Transportation Systems. Los Alamos: IEEE Computer Society Press, 2004, pp. 652-656. ISBN 0-7803-8501-2.
DetailTORRESEN Jim, BAKKE Jorgen W. and SEKANINA Lukáš. Efficient Image Filtering and Information Reduction in Reconfigurable Logic. In: Proc. of 2004 Norchip conference. Oslo: IEEE Computer Society Press, 2004, pp. 63-66. ISBN 0-7803-8510-1.
DetailSEKANINA Lukáš and FRIEDL Štěpán. An Evolvable Combinational Unit for FPGAs. Computing and Informatics, vol. 23, no. 5, 2004, pp. 461-486. ISSN 1335-9150.
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2003
SEKANINA Lukáš. Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware. Lecture Notes in Computer Science, vol. 2003, no. 2606, pp. 186-197. ISSN 0302-9743.
DetailSEKANINA Lukáš. From Implementations to a General Concept of Evolvable Machines. Lecture Notes in Computer Science, vol. 2003, no. 2610, pp. 424-433. ISSN 0302-9743.
DetailSEKANINA Lukáš. Towards Evolvable IP Cores for FPGAs. In: Proc. of The 2003 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2003, pp. 145-154. ISBN 0-7695-1977-6.
DetailSEKANINA Lukáš and RŮŽIČKA Richard. Easily Testable Image Operators: The Class of Circuits Where Evolution Beats Engineers. In: The 2003 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2003, pp. 135-144. ISBN 0-7695-1977-6.
DetailSEKANINA Lukáš. Evolvable Components - From Theory to Hardware Implementations. Natural Computing Series. Berlin: Springer Verlag, 2003. ISBN 3-540-40377-9.
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2002
SEKANINA Lukáš. Image Filter Design with Evolvable Hardware. Lecture Notes in Computer Science, vol. 2002, no. 2279, pp. 255-266. ISSN 0302-9743.
DetailSEKANINA Lukáš and DRÁBEK Vladimír. Automatic Design of Image Operators Using Evolvable Hardware. In: Proc. of 5th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Brno: Brno University of Technology, 2002, pp. 132-139. ISBN 80-214-2094-4.
DetailSEKANINA Lukáš. Evolvable Computational Machines: Formal Approach. In: Intelligent Technologies - Theory and Applications, E-ISCI 2002. Frontiers in Artificial Intelligence and Applications. Amsterdam: IOS Press, 2002, pp. 166-172. ISBN 1-58603-256-9.
DetailSLLAME Azeddien M. and SEKANINA Lukáš. An Evolutionary-Based Algorithm to the Module Selection Problem with Resource Sharing in High-Level Synthesis. In: Advances in Nature-Inspired Computation: The PPSN VII Workshops. Reading: PEDAL, Department of Computer Science, University of Reading, 2002, pp. 45-46. ISBN 0-9543481-0-9.
DetailSEKANINA Lukáš and DRÁBEK Vladimír. A Survey of Bioinspired Methods for Design of Fault Tolerant Reconfigurable Architectures. In: Proc. of the 8th Biennial Baltic Electronics Conference. Tallinn: Tallinn University of Technology, 2002, pp. 355-358. ISBN 9985-59-292-1.
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2000
SEKANINA Lukáš and DRÁBEK Vladimír. Relation Between Fault Tolerance and Reconfiguration in Cellular Systems. In: 6th IEEE Int. On-Line Testing Workshop. Palma de Mallorca, Spain: IEEE Computer Society Press, 2000, pp. 25-30. ISBN 0-7695-0646-1.
DetailSEKANINA Lukáš and RŮŽIČKA Richard. Design of the Special Fast Reconfigurable Chip Using Common FPGA. In: Proc. of Design and Diagnostics of Electronic Circuits and Systems - IEEE DDECS'2000. Smolenice: unknown, 2000, pp. 161-168. ISBN 80-968320-3-4.
DetailSEKANINA Lukáš and SLLAME Azeddien M. Toward Uniform Approach to Design of Evolvable Hardware Based Systems. Lecture Notes in Computer Science, vol. 2000, no. 1896, pp. 814-817. ISSN 0302-9743.
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1999
SEKANINA Lukáš. Evolvable Hardware as Non-Linear Predictor for Image Compression. In: Proc. of the 2nd Prediction Conference Nostradamus'99. Zlín: unknown, 1999, pp. 87-92. ISBN 80-214-1424-3.
DetailSEKANINA Lukáš and DRÁBEK Vladimír. Evolvable hardware - evoluce na čipu. Elektrorevue - www.elektrorevue.cz, vol. 1, no. 5, 1999, p. 5. ISSN 1213-1539.
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