ZyEHW: Evolvable hardware in Xilinx Zynq-7000 field-programmable gate arrays

Czech title

ZyEHW: Evoluční hardware v Xilinx Zynq-7000 programovatelném hradlovém poli

Type

software

License

optional - free

Authors

Dobai Roland, Ing., Ph.D. (DCSY FIT BUT)

Keywords

Evolutionary design, field-programmable gate array, high-level synthesis, on-line synthesis, hardware architecture, image filters

Description

ZyEHW is a joint hardware-software project for evolutionary design in the Xilinx Zynq-7000 field-programmable gate array. It contains (1) the hardware descriptions of the evolutionary design framework implemented in the programmable logic, (2) the software for both ARM processors of the Zynq platform and (3) the software required for generating the inputs and processing the outputs of the evolutionary design framework.

The evolutionary design framework is based on our developed architecture where the candidate solutions can be established and mutated by fine-grained partial reconfiguration of look-up tables. Our advanced control unit and the reduced routing ensures that six candidate solutions can be evaluated in parallel (in a XC7Z020 device) and at a very high operational frequency (a larger device would allow to evaluate even more candidate solutions in parallel).

The program code is deployed into one of the processors of Zynq-7000 and the evolutionary design framework into its programmable logic. Evolutionary on-line synthesis is performed by the other available processor. The functionality is transferred from software into hardware on-line, during runtime. This approach serves essentially the same purpose as high-level synthesis but the synthesis can be performed by a simple embedded computational platform and on-line.

Version v1.0 of ZyEHW includes the complete implementation of the case study for image filter evolution (noise filtering and edge detection).

Location

Bitbucket, Github

Licence

This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program. If not, see <http://www.gnu.org/licenses/>.

Projects

Advanced Methods for Evolutionary Design of Complex Digital Circuits (GA14-04197S)

Research groups

Evolvable Hardware Research Group (VZ EHW)

Departments

Department of Computer Systems FIT BUT (DCSY FIT BUT)