Product Details

RTL benchmark circuit generator

Created: 2007

Czech title
Generátor testovacích obvodů na úrovni RTL
Type
software
License
required - free
Authors
Pečenka Tomáš, Ing. (DCSY FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Keywords

digital circuits, benchmark circuits, design tool, evolutionary algorithm, testability

Description

Cirgen is RTL (Register Transfer level) benchmark circuit generator. It utilizes the evolutionary algorithm to design a structure of a benchmark circuit automatically according to the testability requirements specified by the user. Cirgen can be downloaded from http://www.fit.vutbr.cz/~pecenka/cirgen/

Projects
Design and hardware implementation of a patent-invention machine (GA102/07/0850)
Integrated approach to education of PhD students in the area of parallel and distributed systems (GD102/05/H050)
Security-Oriented Research in Information Technology (MSM0021630528)
Research groups
Dependable Systems Research Group (VZ DEPSYS)
Departments
Department of Computer Systems FIT BUT (DCSY FIT BUT)
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