Detail projektu

Application-specific HW/SW architectures and their applications

Období řešení: 1. 3. 2023 - 31. 12. 2025

Typ projektu: grant

Kód: FIT-S-23-8141

Agentura: Vysoké učení technické v Brně

Program: Vnitřní projekty VUT

Název česky
Aplikačně specifické HW/SW architektury a jejich aplikace
Typ
grant
Klíčová slova

akcelerátor, programovatelné hradlové pole, superpočítač, přibližné výpočty, evoluční algoritmus, monitorování sítě, neuroinženýrství

Abstrakt

Souběžně se vznikem nových aplikací a jejich implementací založených na aplikačně specifických HW/SW architekturách je velmi žádoucí pro ně také vytvářet nové metody návrhu. Nové metody mohou jedinečně využít vlastnosti těchto aplikací a HW/SW platforem k maximalizaci výkonnosti a efektivity výpočtů. Cílem tohoto projektu je vytvořit nové algoritmy a hardwarové platformy použitelné při návrhu vysoce aplikačně specifických počítačových systémů a prokázat jejich efektivitu ve vybraných aplikacích.

Řešitelé
Sekanina Lukáš, prof. Ing., Ph.D. (UPSY FIT VUT) , hlavní řešitel
Bardonek Petr, Ing. (UPSY FIT VUT)
Bayer David, Ing. (FIT VUT)
Bidlo Michal, doc. Ing., Ph.D. (UPSY FIT VUT)
Blašková Barbora, Ing. (FIT VUT)
Duchoň Radek, Ing. (FIT VUT)
Fukač Tomáš, Ing. (UPSY FIT VUT)
Hejcman Lukáš, Ing. (FIT VUT)
Hurta Martin, Ing. (UPSY FIT VUT)
Husa Jakub, Ing., Ph.D. (UPSY FIT VUT)
Hussain Yasir (UPSY FIT VUT)
Chlebík Jakub, Ing. (UPSY FIT VUT)
Jaroš Jiří, doc. Ing., Ph.D. (UPSY FIT VUT)
Jaroš Marta, Ing., PhD. (UPSY FIT VUT)
Jawed Soyiba, Ph.D. (UPSY FIT VUT)
Kadlubiak Kristián, Ing. (UPSY FIT VUT)
Kekely Lukáš, Ing., Ph.D. (UPSY FIT VUT)
Kekely Michal, Ing. (UPSY FIT VUT)
Klhůfek Jan, Ing. (FIT VUT)
Kocnová Jitka, Ing., Ph.D. (UPSY FIT VUT)
Kučera Jan, Ing. (UPSY FIT VUT)
Malik Aamir Saeed, Ph.D. (UPSY FIT VUT)
Martínek Tomáš, doc. Ing., Ph.D. (UPSY FIT VUT)
Mrázek Vojtěch, Ing., Ph.D. (UPSY FIT VUT)
Olšák Ondřej, Ing. (UPSY FIT VUT)
Orsák Michal, Ing. (UPSY FIT VUT)
Pánek Richard, Ing. (UPSY FIT VUT)
Piňos Michal, Ing. (UPSY FIT VUT)
Růžička Richard, doc. Ing., Ph.D., MBA (UPSY FIT VUT)
Sedlák David, Ing. (FIT VUT)
Setinský Jiří, Ing. (FIT VUT)
Strnadel Josef, Ing., Ph.D. (UPSY FIT VUT)
Šimek Václav, Ing. (UPSY FIT VUT)
Šišmiš Lukáš, Ing. (UPSY FIT VUT)
Tisovčík Peter, Ing. (UPSY FIT VUT)
Vašíček Zdeněk, doc. Ing., Ph.D. (UPSY FIT VUT)
Zaheer Muhammad Asad (UPSY FIT VUT)
Publikace

2024

  • DENIZIAK Stanisław, SITEK Paweł, JENIHHIN Maksim, STEININGER Andreas, SCHÖLZEL Mario a MRÁZEK Vojtěch, ed. 27th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Kliece: Institute of Electrical and Electronics Engineers, 2024. ISBN 979-8-3503-5934-3. Detail
  • HUYNH Trung Nam, ZHANG Edward, FRANCIES Olivia, KUKLIŠ Filip, ALLEN Thomas, ZHU Jiaqi, ABEYAKOON Oshaani, LUCKA Felix, BETCKE Marta, JAROŠ Jiří, ARRIDGE Simon, COX Ben T., PLUMB Andrew a BEARD Paul. A fast all-optical 3D photoacoustic scanner for clinical vascular imaging. Nature Biomedical Engineering, roč. 8, č. 10, 2024, s. 1-18. ISSN 2157-846X. Detail
  • AMIN Ullah Hafeez, AHMED Amr, YUSOFF Zuki Mohd, MOHAMAD Saad Mohamad Naufal a MALIK Aamir Saeed. A neurophysiological model based on resting state EEG functional connectivity features for assessing semantic long-term memory performance. Biomedical Signal Processing and Control, roč. 99, č. 1, 2024, s. 1-9. ISSN 1746-8108. Detail
  • JAROŠ Jiří a DUCHOŇ Radek. Acceleration of Ultrasound Neurostimulation Using Mixed-Precision Arithmetic. In: HPDC '24: Proceedings of the 33rd International Symposium on High-Performance Parallel and Distributed Computing. New York: Association for Computing Machinery, 2024, s. 370-372. ISBN 979-8-4007-0413-0. Detail
  • JAWED Soyiba, FAYE Ibrahima a MALIK Aamir Saeed. Deep learning-based assessment model for Real-time identification of visual learners using Raw EEG. IEEE Transactions on Neural Systems and Rehabilitation Engineering, roč. 32, č. 1, 2024, s. 378-390. ISSN 1558-0210. Detail
  • MALIK Aamir Saeed, HUSSAIN Muhammad a CHAUDHARY Safee Ullah. Editorial: From assessment to intervention: role of consumer technology and neurotech in preventive mental health. Frontiers in Psychology, roč. 15, č. 1, 2024. ISSN 1664-1078. Detail
  • JAROŠ Jiří, JAROŠ Marta a BUCHTA Martin. Estimation of Distributed Ultrasound Simulation Execution Time Using Machine Learning. In: 2024 IEEE Congress on Evolutionary Computation (CEC). Yokohama: Institute of Electrical and Electronics Engineers, 2024, s. 1-8. ISBN 979-8-3503-0836-5. Detail
  • JAROŠ Marta a JAROŠ Jiří. k-Dispatch: Enabling Cost-Optimized Biomedical Workflow Offloading. In: HPDC '24: Proceedings of the 33rd International Symposium on High-Performance Parallel and Distributed Computing. New York: Association for Computing Machinery, 2024, s. 358-360. ISBN 979-8-4007-0413-0. Detail
  • STRNADEL Josef, LOJDA Jakub, SMRŽ Pavel a ŠIMEK Václav. Machine Learning in Context of IoT/Edge Devices and LoLiPoP-IoT Project. In: Proceedings of 32nd Austrian Workshop on Microelectronics (Austrochip 2024). Vienna: Institute of Electrical and Electronics Engineers, 2024, s. 1-4. ISBN 979-8-3315-1617-8. Detail
  • OLŠÁK Ondřej a JAROŠ Jiří. On the usage of the Sparse Fourier Transform in ultrasound propagation simulation. In: ICBRA '23: Proceedings of the 10th International Conference on Bioinformatics Research and Applications. New York: Association for Computing Machinery, 2024, s. 107-113. ISBN 979-8-4007-0815-2. Detail
  • OLŠÁK Ondřej a JAROŠ Jiří. Techniques for Efficient Fourier Transform Computation in Ultrasound Simulations. In: HPDC '24: Proceedings of the 33nd International Symposium on High-Performance Parallel and Distributed Computing. New York: Association for Computing Machinery, 2024, s. 361-363. ISBN 979-8-4007-0413-0. Detail
  • GOLDSCHMIDT Patrik a KUČERA Jan. Windower: Feature Extraction for Real-Time DDoS Detection Using Machine Learning. In: NOMS 2024-2024 IEEE Network Operations and Management Symposium. Seoul: Institute of Electrical and Electronics Engineers, 2024, s. 1-10. ISBN 979-8-3503-2793-9. Detail

2023

  • MOINUDDIN Muhammad, ZERGUINE Azzedine a ARIF Muhammad. A Weighted Gaussian Kernel Least Mean Square Algorithm. Circuits, Systems, and Signal Processing, roč. 42, č. 9, 2023, s. 5267-5288. ISSN 0278-081X. Detail
  • HURTA Martin, MRÁZEK Vojtěch, DRAHOŠOVÁ Michaela a SEKANINA Lukáš. ADEE-LID: Automated Design of Energy-Efficient Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers. In: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE). Antwerp: Institute of Electrical and Electronics Engineers, 2023, s. 1-2. ISBN 978-3-9819263-7-8. Detail
  • ŠIŠMIŠ Lukáš a KOŘENEK Jan. Analysis of TLS Prefiltering for IDS Acceleration. In: Passive and Active Measurement 2023. Lecture Notes in Computer Science, roč. 2023. Madrid: Springer Nature Switzerland AG, 2023, s. 85-109. ISBN 978-3-031-28485-4. ISSN 0302-9743. Detail
  • LOJDA Jakub, PÁNEK Richard, SEKANINA Lukáš a KOTÁSEK Zdeněk. Automated Design and Usage of the Fault-Tolerant Dynamic Partial Reconfiguration Controller for FPGAs. Microelectronics Reliability, roč. 2023, č. 144, s. 1-16. ISSN 0026-2714. Detail
  • BARDONEK Petr a ZACHARIÁŠOVÁ Marcela. Control Flow Analysis for Bottom-up Portable Models Creation. In: DVCon Europe 2023; Design and Verification Conference and Exhibition Europe. Mnichov: VDE VERLAG, 2023, s. 65-70. ISBN 978-3-8007-6205-7. Detail
  • CHLEBÍK Jakub a JAROŠ Jiří. Evolutionary Optimization of a Focused Ultrasound Propagation Predictor Neural Network. GECCO 2023 Companion - Proceedings of the 2023 Genetic and Evolutionary Computation Conference Companion. Lisbon: Association for Computing Machinery, 2023. ISBN 979-8-4007-0120-7. Detail
  • HURTA Martin, MRÁZEK Vojtěch, DRAHOŠOVÁ Michaela a SEKANINA Lukáš. Multi-objective Design of Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers. Evo* 2023 -- Late-Breaking Abstracts Volume. Brno, 2023. Detail
  • KEKELY Michal a KOŘENEK Jan. Optimizing Packet Classification on FPGA. In: PROCEEDINGS 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). Tallinn: Institute of Electrical and Electronics Engineers, 2023, s. 7-12. ISBN 979-8-3503-3277-3. ISSN 2334-3133. Detail
  • RŮŽIČKA Richard, ŠIMEK Václav a NEVORAL Jan. Polymorphic RTL Computational Elements. In: Proceedings of the DSD 2023. Durres: IEEE Computer Society, 2023, s. 523-530. ISBN 979-8-3503-4419-6. Detail
  • PIŇOS Michal, MRÁZEK Vojtěch a SEKANINA Lukáš. Prediction of Inference Energy on CNN Accelerators Supporting Approximate Circuits. In: 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Talinn: Institute of Electrical and Electronics Engineers, 2023, s. 45-50. ISBN 979-8-3503-3277-3. Detail
  • SHAIKH Qamar Usman, SHAHZAIB Muhammad, SHAKIL Sadia, BHATTI A. Farrukh a MALIK Aamir Saeed. Robust and Adaptive Terrain Classification and Gait Event Detection System. Heliyon, roč. 9, č. 11, 2023, s. 1-12. ISSN 2405-8440. Detail
  • HUSA Jakub a SEKANINA Lukáš. Semantic Mutation Operator for Fast and Efficient Design of Bent Boolean Functions. Evo* 2023 -- Late-Breaking Abstracts Volume. Brno, 2023. Detail
  • MAHRUKH Rimsha, SHAKIL Sadia a MALIK Aamir Saeed. Sentiments Analysis of fMRI using Automatically Generated Stimuli Labels under Naturalistic Paradigm. Scientific Reports, roč. 13, č. 7267, 2023, s. 1-15. ISSN 2045-2322. Detail
  • AMIN Ullah Hafeez, ULLAH Rafi, REZA Faruque Mohammed a MALIK Aamir Saeed. Single-trial extraction of event-related potentials (ERPs) and classification of visual stimuli by ensemble use of discrete wavelet transform with Huffman coding and machine learning techniques. Journal of NeuroEngineering and Rehabilitation, roč. 20, č. 70, 2023, s. 1-17. ISSN 1743-0003. Detail
  • PÁNEK Richard a LOJDA Jakub. The Fault-tolerant Single-FPGA Systems with a Self-repair Reconfiguration Controller. In: LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings. Quito: Institute of Electrical and Electronics Engineers, 2023, s. 104-107. ISBN 978-1-6654-5705-7. Detail
Produkty

2023

  • autoAx: Automatizovaný framework pro automatické prohledávání návrhového prostoru pro aproximativní akcelerátory v obvodech FPGA a ASIC s otevřeným zdrojovým kódem, software, 2023
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