Project Details
Systém pro programování a realizaci vestavěných systémů
Project Period: 1. 7. 2009 - 30. 6. 2013
Project Type: grant
Code: FR-TI1/038
Agency: Ministry of Industry and Trade of the Czech Republic
Program: TIP
Type
grant
Team members
Masařík Karel, Ing., Ph.D.
(UIFS FIT VUT)
, research leader
Hruška Tomáš, prof. Ing., CSc. (UIFS FIT VUT) , team leader
Hruška Tomáš, prof. Ing., CSc. (UIFS FIT VUT) , team leader
Publications
2013
- CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. An Abstraction of Multi-Port Memories with Arbitrary Addressable Units. In: Computer Aided Systems Theory - EUROCAST 2013. Lecture Notes in Computer Science, vol. 8111. Berlin Heidelberg: Springer Verlag, 2013, pp. 460-468. ISBN 978-3-642-53855-1. Detail
- ZACHARIÁŠOVÁ Marcela, PŘIKRYL Zdeněk, HRUŠKA Tomáš and KOTÁSEK Zdeněk. Automated Functional Verification of Application Specific Instruction-set Processors. IFIP Advances in Information and Communication Technology, vol. 4, no. 403, 2013, pp. 128-138. ISSN 1868-4238. Detail
2012
- CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Automatic Formal Correspondence Checking of ISA and RTL Microprocessor Description. In: Proceedings of the 13th International Workshop on Microprocessor Test and Verification (MTV 2012). Austin, TX: Institute of Electrical and Electronics Engineers, 2012, pp. 6-12. ISBN 978-1-4673-4441-8. Detail
- DOLÍHAL Luděk, HRUŠKA Tomáš and MASAŘÍK Karel. Testing of an automatically generated compiler, Review of retargetable testing system. International Journal on Advances in Software, vol. 2012, no. 1, pp. 15-26. ISSN 1942-2628. Detail
- DOLÍHAL Luděk, HRUŠKA Tomáš and MASAŘÍK Karel. Usage of simulators in testing system. In: Industrial Simulation Conference. Brno: EUROSIS, 2012, pp. 74-78. ISBN 978-90-77381-71-7. Detail
2011
- PŘIKRYL Zdeněk. Advanced Methods of Microprocessor Simulation. Information Sciences and Technologies Bulletin of the ACM Slovakia, vol. 3, no. 3, 2011, pp. 1-13. ISSN 1338-1237. Detail
- PŘIKRYL Zdeněk, KŘOUSTEK Jakub, HRUŠKA Tomáš, KOLÁŘ Dušan, MASAŘÍK Karel and HUSÁR Adam. Design and Simulation of High Performance Parallel Architectures Using the ISAC Language. GSTF International Journal on Computing, vol. 1, no. 2, 2011, pp. 97-106. ISSN 2010-2283. Detail
- ĎURFINA Lukáš, KŘOUSTEK Jakub, ZEMEK Petr, KOLÁŘ Dušan, HRUŠKA Tomáš, MASAŘÍK Karel and MEDUNA Alexander. Design of a Retargetable Decompiler for a Static Platform-Independent Malware Analysis. In: The 5th International Conference on Information Security and Assurance. Communications in Computer and Information Science, Volume 200. Brno: Springer Verlag, 2011, pp. 72-86. ISBN 978-3-642-23140-7. Detail
- ĎURFINA Lukáš, KŘOUSTEK Jakub, ZEMEK Petr, KOLÁŘ Dušan, HRUŠKA Tomáš, MASAŘÍK Karel and MEDUNA Alexander. Design of a Retargetable Decompiler for a Static Platform-Independent Malware Analysis. International Journal of Security and Its Applications, vol. 5, no. 4, 2011, pp. 91-106. ISSN 1738-9976. Detail
- PŘIKRYL Zdeněk, KŘOUSTEK Jakub, HRUŠKA Tomáš and KOLÁŘ Dušan. Fast Just-In-Time Translated Simulator for ASIP Design. In: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Cottbus: IEEE Computer Society, 2011, pp. 279-282. ISBN 978-1-4244-9753-9. Detail
- PŘIKRYL Zdeněk, KŘOUSTEK Jakub, HRUŠKA Tomáš and KOLÁŘ Dušan. Fast Translated Simulation of ASIPs. OpenAccess Series in Informatics (OASIcs), vol. 16, no. 1, 2011, pp. 93-100. ISSN 2190-6807. Detail
- DOLÍHAL Luděk and HRUŠKA Tomáš. Porting of C library, Testing of generated compiler. In: InfoWare 2011. Luxembourg: International Academy, Research, and Industry Association, 2011, pp. 125-130. ISBN 978-1-61208-008-6. Detail
- KŘOUSTEK Jakub, PŘIKRYL Zdeněk, KOLÁŘ Dušan and HRUŠKA Tomáš. Retargetable Multi-level Debugging in HW/SW Codesign. In: The 23rd International Conference on Microelectronics (ICM 2011). Hammamet: Institute of Electrical and Electronics Engineers, 2011, pp. 1-6. ISBN 978-1-4577-2209-7. Detail
- KŘOUSTEK Jakub, ŽIDEK Stanislav, KOLÁŘ Dušan and MEDUNA Alexander. Scattered Context Grammars with Priority. International Journal of Advanced Research in Computer Science, vol. 2, no. 4, 2011, pp. 1-6. ISSN 0976-5697. Detail
2010
- PŘIKRYL Zdeněk, HUSÁR Adam, HRUŠKA Tomáš and MASAŘÍK Karel. ASIP Design in the Lissom Project. In: ACACES 2010 - Poster Abstracts. Ghent: High Performance and Embedded Architecture and Compilation, 2010, pp. 105-108. ISBN 978-90-382-1631-7. Detail
- HUSÁR Adam, TRMAČ Miloslav, HRANÁČ Jan, HRUŠKA Tomáš, MASAŘÍK Karel, KOLÁŘ Dušan and PŘIKRYL Zdeněk. Automatic C Compiler Generation from Architecture Description Language ISAC. In: 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2010, pp. 84-91. ISBN 978-80-87342-10-7. Detail
- PŘIKRYL Zdeněk, KŘOUSTEK Jakub, HRUŠKA Tomáš, KOLÁŘ Dušan, MASAŘÍK Karel and HUSÁR Adam. Design and Debugging of Parallel Architectures Using the ISAC Language. In: Proceedings ot the Annual International Conference on Advanced Distributed and Parallel Computing and Real-Time and Embedded Systems. Singapore: Global Science & Technology Forum, 2010, pp. 213-221. ISBN 978-981-08-7656-2. Detail
- KŘOUSTEK Jakub, ŽIDEK Stanislav, KOLÁŘ Dušan and MEDUNA Alexander. Exploitation of Scattered Context Grammars to Model VLIW Instruction Constraints. In: Proceedings of the 12th Biennial Baltic Electronics Conference. Tallinn: Institute of Electrical and Electronics Engineers, 2010, pp. 165-168. ISBN 978-1-4244-7357-1. Detail
- PŘIKRYL Zdeněk, HRUŠKA Tomáš, MASAŘÍK Karel and HUSÁR Adam. Fast Cycle-Accurate Compiled Simulator. In: 10th IFAC Workshop on Programmable Devices and Embedded Systems, PDeS 2010. Pszczyna: IFAC, 2010, pp. 97-102. ISBN 978-3-902661-95-1. ISSN 1474-6670. Detail
- PŘIKRYL Zdeněk, KŘOUSTEK Jakub, HRUŠKA Tomáš and KOLÁŘ Dušan. Fast Translated Simulation of ASIPs. In: 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2010, pp. 135-142. ISBN 978-80-87342-10-7. Detail
- PŘIKRYL Zdeněk, MASAŘÍK Karel, HRUŠKA Tomáš and HUSÁR Adam. Generated Cycle-Accurate Profiler for C Language. In: 13th EUROMICRO Conference on Digital System Design, DSD'2010. Lille: IEEE Computer Society, 2010, pp. 263-268. ISBN 978-0-7695-4171-6. Detail
- KŘOUSTEK Jakub and ŽIDEK Stanislav. Generating Proper VLIW Assembler Code Using Scattered Context Grammars. In: Proceedings of the 16th Conference Student EEICT 2010 Volume 5. Brno: Faculty of Information Technology BUT, 2010, pp. 181-185. ISBN 978-80-214-4080-7. Detail
- HUSÁR Adam, HRUŠKA Tomáš, MASAŘÍK Karel and PŘIKRYL Zdeněk. Instruction Pipeline Modeling using Petri Nets. In: Proceedings of the International Workshop on Petri Nets and Software Engineering - PNSE'10. Proceedings of the International Workshop on Petri Nets and Software. Universität Hamburg: Technical Universityt Hamburg-Harburg, 2010, pp. 163-164. ISBN 978-972-8692-55-1. Detail
- HUSÁR Adam, HRUŠKA Tomáš, TRMAČ Miloslav and PŘIKRYL Zdeněk. Instruction Selection Patterns Extraction from Architecture Specification Language ISAC. In: Proceedings of the 16th Conference Student EEICT 2010 Volume 5. Brno: Faculty of Information Technology BUT, 2010, pp. 166-170. ISBN 978-80-214-4080-7. Detail
- TRMAČ Miloslav, HUSÁR Adam, HRANÁČ Jan, HRUŠKA Tomáš and MASAŘÍK Karel. Instructor Selector Generation from Architecture Description. In: 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2010, pp. 167-174. ISBN 978-80-87342-10-7. Detail
2009
- HUSÁR Adam, PŘIKRYL Zdeněk, MASAŘÍK Karel and HRUŠKA Tomáš. ASIP Design using Architecture Description Language ISAC. In: ACACES 2009 - Poster Abstracts. Ghent: High Performance and Embedded Architecture and Compilation, 2009, pp. 137-139. ISBN 978-90-382-1467-2. Detail
- KŘOUSTEK Jakub. Code Analysis and Transformation To a High-Level Language. In: Proceedings of the 15th Conference STUDENT EEICT 2009. Brno: Brno University of Technology, 2009, pp. 196-198. ISBN 978-80-214-3868-2. Detail
- PŘIKRYL Zdeněk and HRUŠKA Tomáš. Cycle Accurate Profiler for ASIPs. In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2009, pp. 168-175. ISBN 978-80-87342-04-6. Detail
- PŘIKRYL Zdeněk, MASAŘÍK Karel, HRUŠKA Tomáš and HUSÁR Adam. Fast Cycle-Accurate Interpreted Simulation. In: Tenth International Workshop on Microprocessor Test and Verification: Common Challenges and Solutions. Austin: IEEE Computer Society Press, 2009, pp. 9-14. ISBN 978-0-7695-4000-9. Detail
- KŘOUSTEK Jakub. Usage of Decompilation in Processor Architecture Modeling. In: Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems. Ostrava, 2009, pp. 64-67. ISBN 978-80-86840-47-5. Detail
Products
2011
- ADOP microprocessor, specimen, 2011
Authors: Hruška Tomáš, Masařík Karel, Přikryl Zdeněk, Husár Adam, Fujcik Lukáš, Pristach Marián Detail