Smart Multicore Embedded SYstems

Národní dofinancování projektu: Smart Multicore Embedded SYstems

grant

multi-core architectures, embedded systems

SMECY envisions that recently emerged multi-core technologies will rapidly develop to massively parallel computing environments, which
due to improved performance, energy and cost properties will, in a few years, extensively penetrate the embedded system industry sectors.
This will affect and shape the whole business landscape, e.g. semiconductor vendors need to be capable of offering advanced multi-core
platforms to diverse application sectors, Intellectual Property (IP) providers need to re-target existing and develop new solutions to be
compatible with evolving multi-core platforms and the need of embedded system houses, in addition to product architecture adaptations and
renewing their system, architecture, software and hardware development processes.
The complexity of future smart multi-core embedded systems requires holistic system integration because of stringent constraints on e.g.
performance and time to market that can only be mastered using a design approach that optimizes interaction between SoC design and
Embedded Software approaches. Therefore, many companies that traditionally have a culture rooted in nano and microelectronics express an
urgent need in acquiring know-how and competences in embedded software. Equally urgent is the need of embedded system houses to be
able to transform their current product assets to use multi-cores and at the same time to establish development processes in order to fully
exploit them.
The mission of the SMECY project is to develop new programming technologies enabling the exploitation of many (100s) core architectures.
Multi-core technologies are strategic to keep and win market shares in all areas of embedded systems. ARTEMIS covers well most aspects of
embedded systems, but efficient programming of multi-core architectures for various resources-constrained embedded system applications,
such as consumer, wireless and some transportation fields, is still a grand challenge waiting to be solved. The goal of this ARTEMIS project is
to launch an ambitious European initiative to allow Europe to catch up with Asia (e.g. teams funded by JST/CREST programmes) and USA
(e.g. PARLAB in Berkeley, Parallel@illinois and Pervasive Parallelism Laboratory in Stanford) and to enable Europe to become the leader.
The key outcomes of the SMECY project are programming and design methods, multi-core programmable architectural solutions and
associated supporting tools that enable a holistic integration of multi-core SoC design and embedded software to master smart system design
of future smart multi-core embedded systems in different applications, e.g. consumer, wireless, communication and transportation.

Zemčík Pavel, prof. Dr. Ing. (UPGM FIT VUT) , research leader
Hruška Tomáš, prof. Ing., CSc. (UIFS FIT VUT) , team leader
Smrž Pavel, doc. RNDr., Ph.D. (UPGM FIT VUT) , team leader