Project Details
Manufacturable and Dependable Multicore Architectures at Nanoscale
Project Period: 15. 6. 2011 – 31. 12. 2015
Project Type: grant
Code: COST IC1103
Agency: Ministerstvo školství, mládeže a tělovýchovy ČR
Program: COST
dependability, multicore, architectures, nanoscale, digital circuit, checker,
fault tolerant system, SEU, simulation, generator, testing, verification, FPGA,
reconfiguration, controller,
methodology
Constant advances in manufacturing yield and field reliability are important
enabling factors for electronic devices pervading our lives, from medical to
consumer electronics, from railways to the automotive and avionics scenarios. At
the same time, both technology and architectures are today at a turning point.
These manufacturability and dependability issues will be resolved efficiently
only if a cross-layer approach that takes into account technology, circuit and
architectural aspects will be developed.
The project has
these goals and steps of research:
1) Development and
implementation of a new methodology for fault tolerant systems design into FPGA
including error detection, faults localization, reconfiguration and
synchronization after reconfiguration process.
2) Development
and implementation of a new methodology for automated generation of diagnostic
resources for on-line testing of FPGA based systems.
3)
Development of techniques for the verification of fault tolerant systems quality
together with SEU injector tool to be used for reconfigurable platforms.
align=left>4) Experimental evaluation of the methodology.
5) The analysis
of project results.
Kaštil Jan, Ing., Ph.D.
Mičulka Lukáš, Ing., Ph.D.
Straka Martin, Ing., Ph.D.
Zachariášová Marcela, Ing., Ph.D. (DCSY)
2015
- ČEKAN, O. Principy generování verifikačních stimulů. Počítačové architektury a diagnostika PAD 2015. Zlín: Fakulta aplikované informatiky, Univerzita Tomáše Bati ve Zlíně, 2015.
s. 13-18. ISBN: 978-80-7454-522-1. Detail - ČEKAN, O.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Software Fault Tolerance: the Evaluation by Functional Verification. In Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015.
p. 284-287. ISBN: 978-1-4673-8035-5. Detail - ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Universal Pseudo-random Generation of Assembler Codes for Processors. Proceedings of The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015.
p. 70-73. Detail - KRČMA, M.; KAŠTIL, J.; KOTÁSEK, Z. Mapping trained neural networks to FPNNs. In IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015.
p. 157-160. ISBN: 978-1-4799-6779-7. Detail - KRČMA, M.; KOTÁSEK, Z.; KAŠTIL, J. Fault Tolerant Field Programmable Neural Networks. In 1st IEEE Nordic Circuits and Systems (NORCAS) Conference. Oslo: IEEE Computer Society, 2015.
p. 1-4. ISBN: 978-1-4673-6575-8. Detail - PODIVÍNSKÝ, J.; ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. MICROPROCESSORS AND MICROSYSTEMS, 2015, vol. 39, no. 8,
p. 1215-1230. ISSN: 0141-9331. Detail - PODIVÍNSKÝ, J.; ZACHARIÁŠOVÁ, M.; ČEKAN, O.; KOTÁSEK, Z. FPGA Prototyping and Accelerated Verification of ASIPs. In IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015.
p. 145-148. ISBN: 978-1-4799-6780-3. Detail - PODIVÍNSKÝ, J.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Radiation Impact on Mechanical Application Driven by FPGA-based Controller. Proceedings of The Fourth Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015.
p. 13-16. Detail - ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Automation and Optimization of Coverage-driven Verification. In Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015.
p. 87-94. ISBN: 978-1-4673-8035-5. Detail
2014
- ČEKAN, O. Universal Generation of Test Vectors for Functional Verification. Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014.
p. 44-49. ISBN: 978-80-7494-027-9. Detail - ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Solving of Constraint Satisfaction Problem. Proceedings of the 20th Conference STUDENT EEICT 2014. Volume 3. Brno: Faculty of Information Technology BUT, 2014.
p. 291-295. ISBN: 978-80-214-4924-4. Detail - KOTÁSEK, Z.; MIČULKA, L. Generic Partial Dynamic Reconfiguration Controller for Transient and Permanent Fault Mitigation in Fault Tolerant Systems Implemented Into FPGA. In 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warszawa: IEEE Computer Society, 2014.
p. 171-174. ISBN: 978-0-7695-5074-9. Detail - MATUŠOVÁ, L.; KAŠTIL, J.; KOTÁSEK, Z. Automatic Construction of On-line Checking Circuits Based on Finite Automata. In 17th Euromicro Conference on Digital Systems Design. Verona: IEEE Computer Society, 2014.
p. 326-332. ISBN: 978-0-7695-5074-9. Detail - PODIVÍNSKÝ, J. Testing Fault-Tolerance Properties in FPGA based Electro-mechanical Applications. Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014.
p. 13-18. ISBN: 978-80-7494-027-9. Detail - PODIVÍNSKÝ, J.; ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. In 17th Euromicro Conference on Digital Systems Design. Verona: IEEE Computer Society, 2014.
p. 312-319. ISBN: 978-1-4799-5793-4. Detail - PODIVÍNSKÝ, J.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Complex Control System for Testing Fault-Tolerance Methodologies. Proceedings of The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Dresden: COST, European Cooperation in Science and Technology, 2014.
p. 24-27. ISBN: 978-2-11-129175-1. Detail - ZACHARIÁŠOVÁ, M. Application of Evolutionary Computing for Optimization of Functional Verification. Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014.
p. 135-140. ISBN: 978-80-7494-027-9. Detail
2013
- MIČULKA, L.; KOTÁSEK, Z. Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA. The Second Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2013). Avignon: Politecnico di Milano, 2013.
p. 53-56. ISBN: 978-2-11-129175-1. Detail - ZACHARIÁŠOVÁ, M. New Methods for Increasing Efficiency and Speed of Functional Verification Processes. Počítačové architektury a diagnostika PAD 2013. Plzeň: University of West Bohemia in Pilsen, 2013.
p. 111-116. ISBN: 978-80-261-0270-0. Detail - ZACHARIÁŠOVÁ, M.; BOLCHINI, C.; KOTÁSEK, Z. Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability. IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Karlovy Vary: IEEE Computer Society, 2013.
p. 275-278. ISBN: 978-1-4673-6133-0. Detail - ZACHARIÁŠOVÁ, M.; BOLCHINI, C.; KOTÁSEK, Z. Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability. Proceedings of The Second Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Avignon: COST, European Cooperation in Science and Technology, 2013.
p. 35-38. ISBN: 978-2-11-129175-1. Detail
2012
- KAŠTIL, J.; STRAKA, M.; KOTÁSEK, Z. Methodology for Increasing Reliability of FPGA Design via Partial Reconfiguration. The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12). Annecy: Politecnico di Milano, 2012.
p. 1-4. Detail - KAŠTIL, J.; STRAKA, M.; MIČULKA, L.; KOTÁSEK, Z. Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA. 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools. Cesme-Izmir: IEEE Computer Society, 2012.
p. 250-257. ISBN: 978-0-7695-4798-5. Detail