Project Details
Manufacturable and Dependable Multicore Architectures at Nanoscale
Project Period: 15. 6. 2011 - 31. 12. 2015
Project Type: grant
Code: COST IC1103
Agency: COST, European Cooperation in Science and Technology
Program: COST
dependability, multicore, architectures, nanoscale, digital circuit, checker, fault tolerant system, SEU, simulation, generator, testing, verification, FPGA, reconfiguration, controller,
methodology
Constant advances in manufacturing yield and field reliability are important enabling factors for electronic devices pervading our lives, from medical to consumer electronics, from railways to the automotive and avionics scenarios. At the same time, both technology and architectures are today at a turning point. These manufacturability and dependability issues will be resolved efficiently only if a cross-layer approach that takes into account technology, circuit and architectural aspects will be developed.
The project has these goals and steps of research:
1) Development and implementation of a new methodology for fault tolerant systems design into FPGA including error detection, faults localization, reconfiguration and synchronization after reconfiguration process.
2) Development and implementation of a new methodology for automated generation of diagnostic resources for on-line testing of FPGA based systems.
3) Development of techniques for the verification of fault tolerant systems quality together with SEU injector tool to be used for reconfigurable platforms.
4) Experimental evaluation of the methodology.
5) The analysis of project results.
Kaštil Jan, Ing. (UPSY FIT VUT) , team leader
Mičulka Lukáš, Ing. (UPSY FIT VUT) , team leader
Straka Martin, Ing., Ph.D. (UPSY FIT VUT) , team leader
Zachariášová Marcela, Ing., Ph.D. (UPSY FIT VUT) , team leader
2015
- ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. Automation and Optimization of Coverage-driven Verification. In: Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015, pp. 87-94. ISBN 978-1-4673-8035-5. Detail
- KRČMA Martin, KOTÁSEK Zdeněk and KAŠTIL Jan. Fault Tolerant Field Programmable Neural Networks. In: 1st IEEE Nordic Circuits and Systems (NORCAS) Conference. Oslo: IEEE Computer Society, 2015, pp. 1-4. ISBN 978-1-4673-6575-8. Detail
- PODIVÍNSKÝ Jakub, ZACHARIÁŠOVÁ Marcela, ČEKAN Ondřej and KOTÁSEK Zdeněk. FPGA Prototyping and Accelerated Verification of ASIPs. In: IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015, pp. 145-148. ISBN 978-1-4799-6780-3. Detail
- KRČMA Martin, KAŠTIL Jan and KOTÁSEK Zdeněk. Mapping trained neural networks to FPNNs. In: IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015, pp. 157-160. ISBN 978-1-4799-6779-7. Detail
- ČEKAN Ondřej. Principy generování verifikačních stimulů. In: Počítačové architektury a diagnostika PAD 2015. Zlín: Faculty of Applied Informatics, Tomas Bata University in Zlín, 2015, pp. 13-18. ISBN 978-80-7454-522-1. Detail
- PODIVÍNSKÝ Jakub, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. Radiation Impact on Mechanical Application Driven by FPGA-based Controller. In: Proceedings of The Fourth Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015, pp. 13-16. Detail
- ČEKAN Ondřej, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Software Fault Tolerance: the Evaluation by Functional Verification. In: Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015, pp. 284-287. ISBN 978-1-4673-8035-5. Detail
- PODIVÍNSKÝ Jakub, ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. Microprocessors and Microsystems, vol. 39, no. 8, 2015, pp. 1215-1230. ISSN 0141-9331. Detail
- ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. Universal Pseudo-random Generation of Assembler Codes for Processors. In: Proceedings of The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015, pp. 70-73. Detail
2014
- ZACHARIÁŠOVÁ Marcela. Application of Evolutionary Computing for Optimization of Functional Verification. In: Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014, pp. 135-140. ISBN 978-80-7494-027-9. Detail
- MATUŠOVÁ Lucie, KAŠTIL Jan and KOTÁSEK Zdeněk. Automatic Construction of On-line Checking Circuits Based on Finite Automata. In: 17th Euromicro Conference on Digital Systems Design. Verona: IEEE Computer Society, 2014, pp. 326-332. ISBN 978-0-7695-5074-9. Detail
- PODIVÍNSKÝ Jakub, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. Complex Control System for Testing Fault-Tolerance Methodologies. In: Proceedings of The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Dresden: COST, European Cooperation in Science and Technology, 2014, pp. 24-27. ISBN 978-2-11-129175-1. Detail
- KOTÁSEK Zdeněk and MIČULKA Lukáš. Generic Partial Dynamic Reconfiguration Controller for Transient and Permanent Fault Mitigation in Fault Tolerant Systems Implemented Into FPGA. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warszawa: IEEE Computer Society, 2014, pp. 171-174. ISBN 978-0-7695-5074-9. Detail
- ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. Solving of Constraint Satisfaction Problem. In: Proceedings of the 20th Conference STUDENT EEICT 2014. Volume 3. Brno: Faculty of Information Technology BUT, 2014, pp. 291-295. ISBN 978-80-214-4924-4. Detail
- PODIVÍNSKÝ Jakub. Testing Fault-Tolerance Properties in FPGA based Electro-mechanical Applications. In: Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014, pp. 13-18. ISBN 978-80-7494-027-9. Detail
- PODIVÍNSKÝ Jakub, ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. In: 17th Euromicro Conference on Digital Systems Design. Verona: IEEE Computer Society, 2014, pp. 312-319. ISBN 978-1-4799-5793-4. Detail
- ČEKAN Ondřej. Universal Generation of Test Vectors for Functional Verification. In: Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014, pp. 44-49. ISBN 978-80-7494-027-9. Detail
2013
- ZACHARIÁŠOVÁ Marcela, BOLCHINI Cristiana and KOTÁSEK Zdeněk. Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability. In: IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Karlovy Vary: IEEE Computer Society, 2013, pp. 275-278. ISBN 978-1-4673-6133-0. Detail
- ZACHARIÁŠOVÁ Marcela, BOLCHINI Cristiana and KOTÁSEK Zdeněk. Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability. In: Proceedings of The Second Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Avignon: COST, European Cooperation in Science and Technology, 2013, pp. 35-38. ISBN 978-2-11-129175-1. Detail
- ZACHARIÁŠOVÁ Marcela. New Methods for Increasing Efficiency and Speed of Functional Verification. In: Počítačové architektury a diagnostika PAD 2013. Plzeň: University of West Bohemia in Pilsen, 2013, pp. 111-116. ISBN 978-80-261-0270-0. Detail
- MIČULKA Lukáš and KOTÁSEK Zdeněk. Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA. In: The Second Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2013). Avignon: Politecnico di Milano, 2013, pp. 53-56. ISBN 978-2-11-129175-1. Detail
2012
- KAŠTIL Jan, STRAKA Martin, MIČULKA Lukáš and KOTÁSEK Zdeněk. Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA. In: 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools. Cesme-Izmir: IEEE Computer Society, 2012, pp. 250-257. ISBN 978-0-7695-4798-5. Detail
- KAŠTIL Jan, STRAKA Martin and KOTÁSEK Zdeněk. Methodology for Increasing Reliability of FPGA Design via Partial Reconfiguration. In: The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12). Annecy: Politecnico di Milano, 2012, pp. 1-4. Detail