Project Details

Excelentní mladí vědci na VUT v Brně

Project Period: 1. 7. 2012 – 30. 6. 2015

Project Type: grant

Code: EE2.3.30.0039

Agency: Evropská unie

Program: OP VK - Oblast podpory 2.3 - Lidské zdroje ve VaV

English title
Excellent Young Researchers at BUT
Type
grant
Keywords

young researchers

Abstract

The main goal of this university project is to support the establishment of excellency teams at BUT in Brno by the engagement of new coworkers from other institutions into the activities of research and developing teams at postgraduate positions at BUT Brno with emphasis to internationalisation, multidisciplinarity and intersectoral mobility and cooperation.

Team members
Tomešová Lucie, Ing., MPA (FEKTDěk VO) – research leader
Badíková Iveta, Ing.
Bejček Vlastimil, Ing., CSc.
Beran Vítězslav, doc. Ing., Ph.D. (DCGM)
Dobai Roland, Ing., Ph.D. (CM-SFE)
Hruška Tomáš, prof. Ing., CSc. (DIFS)
Kotoul Michal, prof. RNDr., DrSc. (ÚMTMB OMPM)
Přikryl Zdeněk, Ing., Ph.D.
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY)
Zemčík Pavel, prof. Dr. Ing., dr. h. c. (DCGM)
Publications

2015

  • DOBAI, R.; SEKANINA, L. Low-Level Flexible Architecture with Hybrid Reconfiguration for Evolvable Hardware. ACM Transactions on Reconfigurable Technology and Systems, 2015, vol. 8, no. 3, p. 1-24. ISSN: 1936-7406. Detail

2014

  • DOBAI, R. Evolutionary On-line Synthesis of Hardware Accelerators for Software Modules in Reconfigurable Embedded Systems. In 2014 24th International Conference on Field Programmable Logic and Applications (FPL). Munich: Institute of Electrical and Electronics Engineers, 2014. p. 1-6. ISBN: 978-3-00-044645-0. Detail
  • DOBAI, R.; GLETTE, K.; TORRESEN, J.; SEKANINA, L. Evolutionary Digital Circuit Design with Fast Candidate Solution Establishment in Field Programmable Gate Arrays. In 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014. p. 85-92. ISBN: 978-1-4799-4480-4. Detail
  • PLASCENCIA, A.; CALTENCO, H.; BERAN, V. Comparison of Different Powered-wheelchair Control Modes for Individuals with Severe Motor Impairments. In ICINCO 2014 - Proceedings of the 11th International Conference on Informatics in Control, Automation and Robotics. Vienna: IEEE Computer Society, 2014. p. 353-359. ISBN: 978-989-758-040-6. Detail
  • PŘIKRYL, Z. Fast Simulation of Pipeline in ASIP Simulators. In 15th International Workshop on Microprocessor Test and Verification. Austin: IEEE Computer Society, 2014. p. 1-6. ISBN: 978-0-7695-4000-9. Detail

2013

  • DOBAI, R.; SEKANINA, L. Image Filter Evolution on the Xilinx Zynq Platform. Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems. Torino: IEEE Circuits and Systems Society, 2013. p. 164-171. ISBN: 978-1-4673-6381-5. Detail
  • DOBAI, R.; SEKANINA, L. Towards Evolvable Systems Based on the Xilinx Zynq Platform. 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapur: IEEE Computational Intelligence Society, 2013. p. 89-95. ISBN: 978-1-4673-5869-9. Detail
  • HUSÁR, A.; PŘIKRYL, Z.; DOLÍHAL, L.; MASAŘÍK, K.; HRUŠKA, T. ASIP Design with Automatic C/C++ Compiler Generation. Haifa: 2013. Detail
  • ZACHARIÁŠOVÁ, M.; PŘIKRYL, Z.; HRUŠKA, T.; KOTÁSEK, Z. Automated Functional Verification of Application Specific Instruction-set Processors. IFIP Advances in Information and Communication Technology, 2013, vol. 4, no. 403, p. 128-138. ISSN: 1868-4238. Detail
Products

2015

2014

2013

2012

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