Publication Details

Reduction of Test Vectors Number based on Parasitic Capacity Extraction of Scan Chain Wires

BARTOŠ Pavel and KOTÁSEK Zdeněk. Reduction of Test Vectors Number based on Parasitic Capacity Extraction of Scan Chain Wires. In: Proceedings of CSE 2012 International Scientific Conference on Computer Science and Engineering. Košice: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 2012, pp. 162-169. ISBN 978-80-8143-049-7.
Czech title
Redukce počtu testovacích vektorů založená na extrakci parazitních kapacit vodičů řetězce scan
Type
conference paper
Language
english
Authors
Bartoš Pavel, Ing. (DCSY FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Keywords

scan chain, reorganization, reordering, test, vector, bridge

Abstract

In this paper, method for scan chain optimisation performed after physical layout is presented. It is shown how the method can be used to decrease the number of test vectors. The principles of the method are based on parasitic capacity extraction, eliminating some bridging faults in the physical layout and subsequent reduction of the number of test vectors needed to test the circuit. The method was verified on circuits from benchmark set, experimental results are provided and discussed. It is expected that the method can be used in mass production of electronic components.

Published
2012
Pages
162-169
Proceedings
Proceedings of CSE 2012 International Scientific Conference on Computer Science and Engineering
Conference
International Scientific Conference on Computer Science and Engineering, CSE 2012, Stará Lesná, SK
ISBN
978-80-8143-049-7
Publisher
Faculty of Electrical Engineering and Informatics, University of Technology Košice
Place
Košice, SK
BibTeX 
@INPROCEEDINGS{FITPUB10033,
   author = "Pavel Barto\v{s} and Zden\v{e}k Kot\'{a}sek",
   title = "Reduction of Test Vectors Number based on Parasitic Capacity Extraction of Scan Chain Wires",
   pages = "162--169",
   booktitle = "Proceedings of CSE 2012 International Scientific Conference on Computer Science and Engineering",
   year = 2012,
   location = "Ko\v{s}ice, SK",
   publisher = "Faculty of Electrical Engineering and Informatics, University of Technology Ko\v{s}ice",
   ISBN = "978-80-8143-049-7",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/10033"
}
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