Publication Details
Metoda návrh systémů odolných proti poruchám do omezeného implementačního prostoru na bázi FPGA
Fault Tolerant System Design, Reconfiguration, FPGA.
The main issues to be addressed in the methodology of fault tolerant system design into limited implementation space in FPGA and their possible solutions were presented in this paper.
A methodology, that uses possibility of FPGA reconfiguration after appearance of transient or permanent fault, is presented in this paper. The mitigation of both fault types is based on the ability of new types of FPGAs to update parts of their configuration memory using partial dynamic reconfiguration. The function of circuit configured into FPGA can be changed even at runtime when it is placed in the dynamic part of the FPGA. Reconfiguration is controlled by the controller located in the static part of the FPGA.
@INPROCEEDINGS{FITPUB10050,
author = "Luk\'{a}\v{s} Mi\v{c}ulka",
title = "Metoda n\'{a}vrh syst\'{e}m\r{u} odoln\'{y}ch proti poruch\'{a}m do omezen\'{e}ho implementa\v{c}n\'{i}ho prostoru na b\'{a}zi FPGA",
pages = "61--66",
booktitle = "Po\v{c}\'{i}ta\v{c}ov\'{e} architektury \& diagnostika 2011",
year = 2011,
location = "Bratislava, SK",
publisher = "Faculty of Informatics and Information Technology Slovak University of Technology in Bratislava",
ISBN = "978-80-227-3552-0",
language = "czech",
url = "https://www.fit.vut.cz/research/publication/10050"
}