Publication Details

Fault Tolerant CAN Bus Control System Implemented into FPGA

SZURMAN Karel, KAŠTIL Jan, STRAKA Martin and KOTÁSEK Zdeněk. Fault Tolerant CAN Bus Control System Implemented into FPGA. In: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2013. Karlovy Vary: IEEE Computer Society, 2013, pp. 289-292. ISBN 978-1-4673-6136-1.
Czech title
Řídicí systém sběrnice CAN jako systém odolný proti poruchám v FPGA
Type
conference paper
Language
english
Authors
Szurman Karel, Ing., Ph.D. (DCSY FIT BUT)
Kaštil Jan, Ing. (DCSY FIT BUT)
Straka Martin, Ing., Ph.D. (DCSY FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Keywords

CAN, bus, CANAerospace, TMR, FPGA, SEU

Abstract

For various types of applications, it is necessary to guarantee maximal level of fault tolerance and high reliability of components, avionic and railway applications can serve as an example of these applications. In these devices, electronic components are exhibited to the environment conditions, from among them especially cosmic radiation can have an undesired and destructive effect. In this paper, the basic ideas of the design and implementation of CAN bus based control system into FPGA platform is described. The bus control system uses CANAerospace application protocol. The fault tolerance features of the developed system are improved by TMR architecture. Then, experiments with SEU injection into both non-TMR and TMR architectures are described, the results presented and evaluated. In these experiments, SEU injection framework developed during our previous research was used which injects SEU failures into running FPGA design.

Annotation

For various types of applications, it is necessary to guarantee maximal level of fault tolerance and high reliability of components, avionic and railway applications can serve as an example of these applications. In these devices, electronic components are exhibited to the environment conditions, from among them especially cosmic radiation can have an undesired and destructive effect. In this paper, the basic ideas of the design and implementation of CAN bus based control system into FPGA platform is described. The bus control system uses CANAerospace application protocol. The fault tolerance features of the developed system are improved by TMR architecture. Then, experiments with SEU injection into both non-TMR and TMR architectures are described, the results presented and evaluated. In these experiments, SEU injection framework developed during our previous research was used which injects SEU failures into running FPGA design.

Published
2013
Pages
289-292
Proceedings
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2013
Conference
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2013, Karlovy Vary, CZ
ISBN
978-1-4673-6136-1
Publisher
IEEE Computer Society
Place
Karlovy Vary, CZ
DOI
10.1109/DDECS.2013.6549837
BibTeX 
@INPROCEEDINGS{FITPUB10239,
   author = "Karel Szurman and Jan Ka\v{s}til and Martin Straka and Zden\v{e}k Kot\'{a}sek",
   title = "Fault Tolerant CAN Bus Control System Implemented into FPGA",
   pages = "289--292",
   booktitle = "IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2013",
   year = 2013,
   location = "Karlovy Vary, CZ",
   publisher = "IEEE Computer Society",
   ISBN = "978-1-4673-6136-1",
   doi = "10.1109/DDECS.2013.6549837",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/10239"
}
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