Publication Details

Low Latency Book Handling in FPGA for High Frequency Trading

DVOŘÁK Milan and KOŘENEK Jan. Low Latency Book Handling in FPGA for High Frequency Trading. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warszawa: IEEE Computer Society, 2014, pp. 175-178. ISBN 978-1-4799-4558-0.
Czech title
Nízkolatenční správa knihy v FPGA pro rychlé obchodování na burze
Type
conference paper
Language
english
Authors
Keywords

FPGA, Cuckoo hashing, HFT, High Frequency Trading,

Abstract

Recent growth in algorithmic trading has caused a demand for lowering the latency of systems for electronic trading. FPGA cards are widely used to reduce latency and accelerate market data processing. To create a low latency trading system, it is crucial to effectively build a representation of the market state (book) in hardware. Thus, we have designed a new hardware architecture, which updates the book with the best bid/offer prices based on the incoming messages from the exchange. For each message a corresponding financial instrument needs to be looked up and its record needs to be updated. Proposed architecture is utilizing cuckoo hashing for the book handling, which enables low latency symbol lookup and high memory utilization. In this paper we discuss a trade-off between lookup latency and memory utilization. With average latency of 253 ns the proposed architecture is able to handle 119 275 instruments while using only 144 Mbit QDR SRAM.

Published
2014
Pages
175-178
Proceedings
17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
Conference
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2014, Warsaw, PL
ISBN
978-1-4799-4558-0
Publisher
IEEE Computer Society
Place
Warszawa, PL
DOI
UT WoS
000346734200035
EID Scopus
BibTeX
@INPROCEEDINGS{FITPUB10622,
   author = "Milan Dvo\v{r}\'{a}k and Jan Ko\v{r}enek",
   title = "Low Latency Book Handling in FPGA for High Frequency Trading",
   pages = "175--178",
   booktitle = "17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems",
   year = 2014,
   location = "Warszawa, PL",
   publisher = "IEEE Computer Society",
   ISBN = "978-1-4799-4558-0",
   doi = "10.1109/DDECS.2014.6868785",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/10622"
}
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