Publication Details

Využití dynamické rekonfigurace vestavěných systémů pro monitorování počítačových sítí

VIKTORIN Jan. Využití dynamické rekonfigurace vestavěných systémů pro monitorování počítačových sítí. In: Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014, pp. 50-55. ISBN 978-80-7494-027-9. Available from: http://pad2014.fm.tul.cz/docs/PAD2014-elektronicky_online.pdf
English title
Applying dynamic reconfiguration of embedded systems for network monitoring
Type
conference paper
Language
czech
Authors
Viktorin Jan, Ing. (DCSY FIT BUT)
URL
Keywords

FPGA, Partial Dynamic Reconfiguration, ARM, System-on-Chip, HW/SW
codesign

Abstract

The article introduces an architecture of an embedded system intended for network monitoring. The architecture utilizes a system-on-chip with an integrated reconfigurable logic (FPGA). The tight integration between the processor and FPGA enables to take advantage of partial dynamic reconfiguration for acceleration of time-critical operations. It is possible to create system with lower price, lower power consumption and smaller size while preserving the througput of the system.

Published
2014
Pages
50-55
Proceedings
Počítačové architektury a diagnostika 2014
Conference
Počítačové architektury a diagnostika 2014, Malá Skála, CZ
ISBN
978-80-7494-027-9
Publisher
Liberec University of Technology
Place
Liberec, CZ
BibTeX 
@INPROCEEDINGS{FITPUB10664,
   author = "Jan Viktorin",
   title = "Vyu\v{z}it\'{i} dynamick\'{e} rekonfigurace vestav\v{e}n\'{y}ch syst\'{e}m\r{u} pro monitorov\'{a}n\'{i} po\v{c}\'{i}ta\v{c}ov\'{y}ch s\'{i}t\'{i}",
   pages = "50--55",
   booktitle = "Po\v{c}\'{i}ta\v{c}ov\'{e} architektury a diagnostika 2014",
   year = 2014,
   location = "Liberec, CZ",
   publisher = "Liberec University of Technology",
   ISBN = "978-80-7494-027-9",
   language = "czech",
   url = "https://www.fit.vut.cz/research/publication/10664"
}
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