Publication Details

PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis

CRHA Adam, ŠIMEK Václav and RŮŽIČKA Richard. PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis. In: 22nd Euromicro Conference on Digital System Design. Kallithea, Chalkidiki: Institute of Electrical and Electronics Engineers, 2019, pp. 335-342. ISBN 978-1-7281-2861-0.
Czech title
PAIG přepisování: Cesta ke škálovatelné syntéze multifunkčních číslicových obvodů
Type
conference paper
Language
english
Authors
Keywords

Logic synthesis, polymorphic circuits, AIG,
rewriting, PAIG, optimization.

Abstract

Main objective of this paper is to introduce a novel
methodology for scalable synthesis of multifunctional (polymorphic)
digital circuits. Despite the fact that several approaches
have been proposed during recent years, those are applicable
for small-scale circuits only or based on various evolution-inspired
techniques. Obviously, there does not exist yet scalable
synthesis methodology for complex multifunctional circuits. The
proposed methodology is based on And-Inverter Graphs (AIGs)
with built-in extension for multifunctional circuits where the
employment of rewriting technique reduces the area by sharing
common resources of two different input circuits. Experiments
on publicly available benchmark circuits demonstrate significant
area reduction.

Published
2019
Pages
335-342
Proceedings
22nd Euromicro Conference on Digital System Design
Conference
22nd Euromicro Conference on Digital Systems Design, Athos Palace Hotel, Solinas, Kalithea, 63077 Chalkidiki, GR
ISBN
978-1-7281-2861-0
Publisher
Institute of Electrical and Electronics Engineers
Place
Kallithea, Chalkidiki, GR
DOI
UT WoS
000722275400047
EID Scopus
BibTeX
@INPROCEEDINGS{FITPUB11957,
   author = "Adam Crha and V\'{a}clav \v{S}imek and Richard R\r{u}\v{z}i\v{c}ka",
   title = "PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis",
   pages = "335--342",
   booktitle = "22nd Euromicro Conference on Digital System Design",
   year = 2019,
   location = "Kallithea, Chalkidiki, GR",
   publisher = "Institute of Electrical and Electronics Engineers",
   ISBN = "978-1-7281-2861-0",
   doi = "10.1109/DSD.2019.00056",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/11957"
}
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