Publication Details

Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks

PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, ČEKAN Ondřej, KRČMA Martin and KOTÁSEK Zdeněk. Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks. In: 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS). San José: IEEE Circuits and Systems Society, 2020, pp. 1-4. ISBN 978-1-7281-3427-7.
Czech title
Využití platformy pro ověřování odolnosti proti poruchám pro analýzu spolehlivosti elektronických zámků
Type
conference paper
Language
english
Authors
Podivínský Jakub, Ing., Ph.D. (DCSY FIT BUT)
Lojda Jakub, Ing., Ph.D. (DCSY FIT BUT)
Pánek Richard, Ing. (DCSY FIT BUT)
Čekan Ondřej, Ing., Ph.D. (DCSY FIT BUT)
Krčma Martin, Ing. (DCSY FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Keywords

Electronic Lock, Stepper Motor, FPGA, Fault Tolerance,
Fault Injection

Abstract

This research paper presents examination of the influences of faults on a control unit of smart electronic locks. A stepper motor is often used as an actuator of such smart locks and its motor controller is usually implemented in a processor. The aim of this paper is to examine the impact of faults occurring in the control processor. It should be noted that faults in such electronic systems can also be induced artificially, usually with ulterior motives. The processor can be implemented in an FPGA (Field Programmable Gate Array) in order to be able to emulate HW faults inside the processor. This allows us to use previously developed evaluation platform for fault tolerance testing. This platform allows us to monitor impact of faults both on electronic and mechanical parts of electro-mechanical system. In this paper, the evaluation of faults artificially injected in FPGA-based processor is proposed. Experiments with both single and multiple fault injections were held.

Published
2020
Pages
1-4
Proceedings
2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS)
Conference
IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS, Holiday Inn Hotel, Escazu, San José, CR
ISBN
978-1-7281-3427-7
Publisher
IEEE Circuits and Systems Society
Place
San José, CR
DOI
10.1109/LASCAS45839.2020.9068977
EID Scopus
2-s2.0-85084320586
BibTeX 
@INPROCEEDINGS{FITPUB12080,
   author = "Jakub Podiv\'{i}nsk\'{y} and Jakub Lojda and Richard P\'{a}nek and Ond\v{r}ej \v{C}ekan and Martin Kr\v{c}ma and Zden\v{e}k Kot\'{a}sek",
   title = "Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks",
   pages = "1--4",
   booktitle = "2020 IEEE 11th Latin American Symposium on Circuits \& Systems (LASCAS)",
   year = 2020,
   location = "San Jos\'{e}, CR",
   publisher = "IEEE Circuits and Systems Society",
   ISBN = "978-1-7281-3427-7",
   doi = "10.1109/LASCAS45839.2020.9068977",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/12080"
}
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