Publication Details

Hardening of Smart Electronic Lock Software against Random and Deliberate Faults

LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin and KOTÁSEK Zdeněk. Hardening of Smart Electronic Lock Software against Random and Deliberate Faults. In: Proceedings - Euromicro Conference on Digital System Design, DSD 2020. Kranj: Institute of Electrical and Electronics Engineers, 2020, pp. 680-683. ISBN 978-1-7281-9535-3.
Czech title
Zlepšení odolnosti chytrého elektronického zámku proti náhodným a úmyslným poruchám
Type
conference paper
Language
english
Authors
Keywords

Electronic Lock, Stepper Motor, Fault Tolerance, Fault Injection, FPGA, IMEM, DMEM, LUT

Abstract

In this research paper, analysis of smart electronic lock behavior during presence of faults in its controller is examined. A typical smart electronic lock is composed of a controller unit, usually implemented in a processor, and the mechanical part, which may be for example a stepper motor. The goal of this research paper is to examine the consequences of failing controller running a partly hardened program, which we developed from the experiences we gained in our previous research. We implement the controller processor in Field Programmable Gate Array (FPGA) in order to inject faults into our components. This paper focuses on fault injection into occupied parts of Instruction Memory (IMEM) and Data Memory (DMEM). Moreover, permanent failures of the processor are simulated by fault injection into occupied Look-up Tables (LUTs) of the processor design on the FPGA. Our results show that the application of certain SW-implemented fault tolerance methods may, in opposite, degrade the hardness of the system. Our experiments imply that the IMEM is the most sensitive to fault injection, because there is no possibility for an eventual self repair. In the case of DMEM, erroneous values may be possibly repaired when the variable is rewritten back to the memory, slightly lowering the DMEM sensitivity to fault injections. The CPU itself is the least susceptible. Although faults are injected to the utilized contents only, for the CPU LUTs, a certain part of the logic may not be used to implement the required function.

Published
2020
Pages
680-683
Proceedings
Proceedings - Euromicro Conference on Digital System Design, DSD 2020
Conference
23rd Euromicro Conference on Digital System Design (DSD), Portorož, Slovenia, Grand Hotel Bernardin, SI
ISBN
978-1-7281-9535-3
Publisher
Institute of Electrical and Electronics Engineers
Place
Kranj, SI
DOI
UT WoS
000630443300099
EID Scopus
BibTeX
@INPROCEEDINGS{FITPUB12256,
   author = "Jakub Lojda and Richard P\'{a}nek and Jakub Podiv\'{i}nsk\'{y} and Ond\v{r}ej \v{C}ekan and Martin Kr\v{c}ma and Zden\v{e}k Kot\'{a}sek",
   title = "Hardening of Smart Electronic Lock Software against Random and Deliberate Faults",
   pages = "680--683",
   booktitle = "Proceedings - Euromicro Conference on Digital System Design, DSD 2020",
   year = 2020,
   location = "Kranj, SI",
   publisher = "Institute of Electrical and Electronics Engineers",
   ISBN = "978-1-7281-9535-3",
   doi = "10.1109/DSD51259.2020.00110",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/12256"
}
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