Publication Details

Web-Based Simulator of Superscalar RISC-V Processors

JAROŠ Jiří, MAJER Michal, HORKÝ Jakub and VÁVRA Jan. Web-Based Simulator of Superscalar RISC-V Processors. In: SC24-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis. Atlanta, GA: Institute of Electrical and Electronics Engineers, 2025, pp. 1676-1684. ISBN 979-8-3503-5554-3. Available from: https://ieeexplore.ieee.org/document/10820703
Czech title
Webový simulátor superskalárních procesorů RISC-V
Type
conference paper
Language
english
Authors
Jaroš Jiří, doc. Ing., Ph.D. (DCSY FIT BUT)
Majer Michal, Ing. (FIT BUT)
Horký Jakub, Ing. (FIT BUT)
Vávra Jan, Ing. (FIT BUT)
URL
Keywords

Web-based simulator, RISC-V processor, superscalar processor 

Abstract

Mastering computational architectures is essential for developing fast and power-efficient programs. Our advanced simulator empowers both IT students and professionals to  grasp the fundamentals of superscalar RISC-V processors, HW/SW co-design and HPC optimization techniques. With customizable processor and memory architecture, full C compiler support, and detailed runtime statistics, this tool offers a comprehensive learning experience. Enjoy the convenience of a modern, web-based GUI to enhance your understanding and skills.

Published
2025
Pages
1676-1684
Proceedings
SC24-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis
Conference
The International Conference for High Performance Computing, Networking, Storage, and Analysis, Georgia World Congress Center, Atlanta,Georgia, US
ISBN
979-8-3503-5554-3
Publisher
Institute of Electrical and Electronics Engineers
Place
Atlanta, GA, US
DOI
10.1109/SCW63240.2024.00209
BibTeX 
@INPROCEEDINGS{FITPUB13258,
   author = "Ji\v{r}\'{i} Jaro\v{s} and Michal Majer and Jakub Hork\'{y} and Jan V\'{a}vra",
   title = "Web-Based Simulator of Superscalar RISC-V Processors",
   pages = "1676--1684",
   booktitle = "SC24-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis",
   year = 2025,
   location = "Atlanta, GA, US",
   publisher = "Institute of Electrical and Electronics Engineers",
   ISBN = "979-8-3503-5554-3",
   doi = "10.1109/SCW63240.2024.00209",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/13258"
}
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