Publication Details

An FPGA-Based Systolic Serial Multiplier

DVOŘÁK Václav and SLLAME Azeddien M.. An FPGA-Based Systolic Serial Multiplier. In: Proceedings of the 5th Electronic Devices and Systems Conference 1998. Brno: unknown, 1998, pp. 394-397. ISBN 80-214-1198-8.

Type

conference paper

Language

english

Authors

Dvořák Václav, Prof. Ing., DrSc. (DCSE FEECS BUT)
Sllame Azeddien M., Ing. (DCSE FEECS BUT)

Published

1998

Pages

394-397

Proceedings

Proceedings of the 5th Electronic Devices and Systems Conference 1998

ISBN

80-214-1198-8

Place

Brno, CZ

BibTeX

@INPROCEEDINGS{FITPUB5660,
   author = "V\'{a}clav Dvo\v{r}\'{a}k and M. Azeddien Sllame",
   title = "An FPGA-Based Systolic Serial Multiplier",
   pages = "394--397",
   booktitle = "Proceedings of the 5th Electronic Devices and Systems Conference 1998",
   year = 1998,
   location = "Brno, CZ",
   ISBN = "80-214-1198-8",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/5660"
}