Detail publikace

Optimizing SW/HW Architecture for Parallel Embedded Systems - A Case Study

DVOŘÁK Václav. Optimizing SW/HW Architecture for Parallel Embedded Systems - A Case Study. In: Proceedings of the the International Workshop on Discrete-Event System Design, DESDes'01. Przytok near Zielona Gora, POLAND: Oficyna Wydawnicza Politechniky Zielonogórskiej, 2001, s. 103-108. ISBN 83-85911-62-6.
Typ
článek ve sborníku konference
Jazyk
angličtina
Autoři
Dvořák Václav, Prof. Ing., DrSc. (UIVT FEI VUT)
Rok
2001
Strany
103-108
Sborník
Proceedings of the the International Workshop on Discrete-Event System Design, DESDes'01
Konference
The International Workshop on Discrete-Event System Design, DESDes'01, Przytok near Zielona Gora, PL
ISBN
83-85911-62-6
Vydavatel
Oficyna Wydawnicza Politechniky Zielonogórskiej
Místo
Przytok near Zielona Gora, POLAND, PL
BibTeX 
@INPROCEEDINGS{FITPUB5672,
   author = "V\'{a}clav Dvo\v{r}\'{a}k",
   title = "Optimizing SW/HW Architecture for Parallel Embedded Systems - A Case Study",
   pages = "103--108",
   booktitle = "Proceedings of the the International Workshop on Discrete-Event System Design, DESDes'01",
   year = 2001,
   location = "Przytok near Zielona Gora, POLAND, PL",
   publisher = "Publishing House of Zielona Gora Technical University",
   ISBN = "83-85911-62-6",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/5672"
}
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