Boundary Scan of PCBs with Xilinx FPGAs

Type

conference paper

Language

english

Authors

Kotásek Zdeněk, Doc. Ing., CSc. (DCSE FEECS BUT)
Zbořil František, Doc. Ing., CSc. (DCSE FEECS BUT)

Keywords

Design for testability, Boundary Scan, PCBs Testing, Xilinx FPGAs

Abstract

The paper describes the research activities the goal of which is to develop simple software tools for applying test to printed circuit boards based on Xilinx XC4000 through Boundary Scan (BS) registers and deriving the set of test vectors on the basis of the EDIF data analysis. The possible configurations of scan chains are discussed. The principles of controlling the test application are discussed in detail.

Annotation

The paper describes the research activities the goal of which is to develop simple software tools for applying test to printed circuit boards based on Xilinx XC4000 through Boundary Scan (BS) registers and deriving the set of test vectors on the basis of the EDIF data analysis. The possible configurations of scan chains are discussed. The principles of controlling the test application are discussed in detail.

Published

1998

Pages

70-74

Proceedings

Sborník konference ECI98

ISBN

80-88786-94-0

Place

Herlany, SK

BibTeX

@INPROCEEDINGS{FITPUB6040,
   author = "Zden\v{e}k Kot\'{a}sek and Franti\v{s}ek Zbo\v{r}il",
   title = "Boundary Scan of PCBs with Xilinx FPGAs",
   pages = "70--74",
   booktitle = "Sborn\'{i}k konference ECI98",
   year = 1998,
   location = "Herlany, SK",
   ISBN = "80-88786-94-0",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/6040"
}