Publication Details

Formal Approach to RTL Testability Analysis

HLAVIČKA Jan, KOTÁSEK Zdeněk and RŮŽIČKA Richard. Formal Approach to RTL Testability Analysis. In: sborník konference IEEE LATW 2000. Rio de Janeiro: unknown, 2000, pp. 98-103.
Type
conference paper
Language
english
Authors
Hlavička Jan, Prof. Ing., DrSc. (FEE CTU)
Kotásek Zdeněk, Doc. Ing., CSc. (DCSE FEECS BUT)
Růžička Richard, Ing. (DCSE FEECS BUT)
Keywords

RTL testability analysis

Abstract

In the paper a formal approach to the RT level testability analysis is presented. It is based on the structural analysis of the circuit under design and the classification of circuit elements. The elements are classified on the basis of their possible role during the test application. The principles known from the theory of sets and mathematical logic are utilised to define the role of registers during the test application. The principles of developing the RT level testability analysis algorithms are then presented to identify registers for partial scan and parallel paths to apply the test of the circuit.

Published
2000
Pages
98-103
Proceedings
sborník konference IEEE LATW 2000
Conference
IEEE LATW 2000, Rio de Janeiro, BR
Place
Rio de Janeiro, BR
BibTeX 
@INPROCEEDINGS{FITPUB6044,
   author = "Jan Hlavi\v{c}ka and Zden\v{e}k Kot\'{a}sek and Richard R\r{u}\v{z}i\v{c}ka",
   title = "Formal Approach to RTL Testability Analysis",
   pages = "98--103",
   booktitle = "sborn\'{i}k konference IEEE LATW 2000",
   year = 2000,
   location = "Rio de Janeiro, BR",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/6044"
}
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