Design Space Exploration of Parallel Embedded Applications Based on Performance-Oriented Specifications

application-specific architectures, multiprocessor simulation, hardware-software codesign

The choice of HW/SW multiprocessor architecture for a specific embedded application is not an easy task due to many possible processing elements, type of their interconnection, various partitioning of the code and data and mapping them on processing elements. The paper addresses this issue and uses a single CSP-based simulation tool Transim for multiple architectures. Exploration of a vast design space for a generally heterogeneous network of processing elements is quick, because only first-order effects can be considered. Variations in processor count, clock rate, link speed, bus bandwidth, cache line size, as well as in partitioning and mapping the resulting sw components to processors can be easily accounted for. The technique is demonstrated on solution of large dense systems of linear equations in real time.