Publication Details
Embedded System Formal Specifications Reuse by a Case-Based Reasoning Approach
Specifications Reuse, Embedded Systems, Finite-State Automata, State Sequences, Timed Automata, Timed-State Sequences, Case-Based Reasoning
The paper deals with the reuse of behavioral specifications for embedded systems design employing state or timed-state sequences, their closed-form descriptions by finite-state or timed automata, and corresponding formulae of temporal logics. To demonstrate reusing those formal specifications by means of application patterns, the contribution presents two case studies based on two real design projects: (1) petrol pumping station dispenser controller and (2) multiple lift control system. The last part of the paper provides an insight into case-based reasoning support as applied to formal specification reuse of application patterns represented by finite-state and timed automata. Moreover, it discusses possible strategies for automated retrieval of similar patterns from the case library that serves as a knowledge base supporting an efficient reuse of formal specifications.
@INPROCEEDINGS{FITPUB7125, author = "Miroslav \v{S}v\'{e}da and Radim\'{i}r Vrba", title = "Embedded System Formal Specifications Reuse by a Case-Based Reasoning Approach", pages = "157--162", booktitle = "Proceedings of the 6th World Multiconference on Systemics, Cybernetics and Informatics, 2002, Vol. I", year = 2003, location = "Orlando, US", publisher = "The International Institute of Informatics and Systemics", ISBN = "980-07-8150-1", language = "english", url = "https://www.fit.vut.cz/research/publication/7125" }