Communication Architectures for Application-Specific Multiprocessor Systems (on a Chip)

Communication architecture, Multiprocessor SoC, Stream multiprocessing, Group communication complexity

A problem of designing communication architecture optimized for specific applications is considered. Given the mapping of a parallel algorithm to a homogenous network of CPUs with satisfactory load balancing, all that matters in obtaining the highest performance is the interconnection network and communication algorithms. Several on-chip communication architectures are compared with respect to their performance in group communications and hardware cost. A methodology for designing efficient on-chip interconnects for regular group communication patterns is then suggested. Three benchmark applications are used to illustrate the approach as well as superiority of  the fat cube over the Octagonal architecture.