Publication Details

Improving Testability Parameters of Pipelined Circuits Through the Identification of Testable Cores

KOTÁSEK Zdeněk, PEČENKA Tomáš and STRNADEL Josef. Improving Testability Parameters of Pipelined Circuits Through the Identification of Testable Cores. In: Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Bratislava: Slovak Academy of Science, 2004, pp. 99-104. ISBN 80-969117-9-1.
Czech title
Zlepšení parametrů testovatelnosti zřetězených obvodů metodou identifikace testovatelných jader
Type
conference paper
Language
english
Authors
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Pečenka Tomáš, Ing. (DCSY FIT BUT)
Strnadel Josef, Ing., Ph.D. (DCSY FIT BUT)
URL
Keywords

scan methods, testability, controlability/observability, testable core

Abstract

A new methodology of selecting registers into scan chain is presented. It is based on the identification of testable cores.  The methodology is supposed to be used preferably for pipelined circuits consisting of a high number of stages. In the paper, the idea of testable cores is illustrated and defined. The method based on a genetic algorithm is described and verified on several typical pipelined circuits. Experimental results are discussed and summarized in the table. At the end of the paper, conclusions and future research perspectives are indicated.

Published
2004
Pages
99-104
Proceedings
Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Conference
The 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems , Tatranská Lesná, SK
ISBN
80-969117-9-1
Publisher
Slovak Academy of Science
Place
Bratislava, SK
BibTeX 
@INPROCEEDINGS{FITPUB7507,
   author = "Zden\v{e}k Kot\'{a}sek and Tom\'{a}\v{s} Pe\v{c}enka and Josef Strnadel",
   title = "Improving Testability Parameters of Pipelined Circuits Through the Identification of Testable Cores",
   pages = "99--104",
   booktitle = "Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems",
   year = 2004,
   location = "Bratislava, SK",
   publisher = "Slovak Academy of Science",
   ISBN = "80-969117-9-1",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/7507"
}
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