Publication Details

Automatic Discovery of RTL Benchmark Circuits with Predefined Testability Properties

PEČENKA Tomáš, KOTÁSEK Zdeněk, SEKANINA Lukáš and STRNADEL Josef. Automatic Discovery of RTL Benchmark Circuits with Predefined Testability Properties. In: Proc. of the 2005 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2005, pp. 51-58. ISBN 0-7695-2399-4.
Czech title
Automatické objevení benchmarkových obvodů na úrovni RT s požadovanými parametry testovatelnosti
Type
conference paper
Language
english
Authors
Pečenka Tomáš, Ing. (DCSY FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY FIT BUT)
Strnadel Josef, Ing., Ph.D. (DCSY FIT BUT)
URL
Keywords

evolutionary design, digital circuit, testability analysis, VHDL

Abstract

The paper describes the utilization of evolutionary algorithms for automatic discovery of benchmark circuits. The main objective of the paper is to show that relatively large and complex (benchmark) circuits can be evolved in case that only a given property (e.g. testability) is required and the function of the circuit is not considered. This principle is demonstrated on automatic discovery of benchmark circuits with predefined structural and diagnostic properties. Fitness evaluation for the proposed algorithm is based on testability analysis with linear time complexity. During the evolution, the solutions which are refused to be synthesized by a design system are excluded from the process of developing a new generation of benchmark circuits. The evolved circuits contain thousands of components and satisfy the required testability properties.

Published
2005
Pages
51-58
Proceedings
Proc. of the 2005 NASA/DoD Conference on Evolvable Hardware
Conference
The 2005 NASA/DoD Conference on Evolvable Hardware, Washington D.C., US
ISBN
0-7695-2399-4
Publisher
IEEE Computer Society Press
Place
Los Alamitos, US
BibTeX 
@INPROCEEDINGS{FITPUB7811,
   author = "Tom\'{a}\v{s} Pe\v{c}enka and Zden\v{e}k Kot\'{a}sek and Luk\'{a}\v{s} Sekanina and Josef Strnadel",
   title = "Automatic Discovery of RTL Benchmark Circuits with Predefined Testability Properties",
   pages = "51--58",
   booktitle = "Proc. of the 2005 NASA/DoD Conference on Evolvable Hardware",
   year = 2005,
   location = "Los Alamitos, US",
   publisher = "IEEE Computer Society Press",
   ISBN = "0-7695-2399-4",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/7811"
}
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