Publication Details

Reconfigurable image processing architecture with simulink prototyping support

SCHIER Jan, KOVÁŘ Bohumil, ZEMČÍK Pavel, HEROUT Adam and BERAN Vítězslav. Reconfigurable image processing architecture with Simulink prototyping support. In: Sborník "Technical Computing 2005". Praha, 2005, pp. 1-4.

Czech title

Rekonfigurovatelná architektura pro zpracování obrazu s prototypováním v Simulinku

Type

conference paper

Language

english

Authors

Schier Jan, Dr. Ing. (UTIA CAS CR)
Kovář Bohumil, Ing. (UTIA CAS CR)
Zemčík Pavel, prof. Dr. Ing. (DCGM FIT BUT)
Herout Adam, prof. Ing., Ph.D. (DCGM FIT BUT)
Beran Vítězslav, doc. Ing., Ph.D. (DCGM FIT BUT)

Keywords

Simulink, DSP, FPGA, scripting language

Abstract

The contribution is focused on conversion of block schematics prepared in Simulink into a scripting language so that the output can be used for reconfiguration of the flexible architecture based on DSP and FPGA for implementation of such block schematics.

Published

2005

Pages

1-4

Proceedings

Sborník "Technical Computing 2005"

Conference

Technical Computing 2005, Praha, CZ

Place

Praha, CZ

BibTeX

@INPROCEEDINGS{FITPUB7975,
   author = "Jan Schier and Bohumil Kov\'{a}\v{r} and Pavel Zem\v{c}\'{i}k and Adam Herout and V\'{i}t\v{e}zslav Beran",
   title = "Reconfigurable image processing architecture with simulink prototyping support",
   pages = "1--4",
   booktitle = "Sborn\'{i}k {"}Technical Computing 2005{"}",
   year = 2005,
   location = "Praha, CZ",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/7975"
}