Publication Details
Novel Logic Circuits Controlled by Vdd
SEKANINA Lukáš, STAREČEK Lukáš and KOTÁSEK Zdeněk. Novel Logic Circuits Controlled by Vdd. In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Praha: IEEE Computer Society, 2006, pp. 85-86. ISBN 1424401844.
Czech title
Nové logické obvody řizené napájecím napětím
Type
conference paper
Language
english
Authors
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY FIT BUT)
Stareček Lukáš, Ing. (DCSY FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Stareček Lukáš, Ing. (DCSY FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Keywords
polymorphic gate, logic circuit, evolutionary design
Abstract
Polymorphic gates exhibit one or more additional functions in addition to the main function of the gate. The additional functions can be activated under certain conditions by changing control parameters (such as temperature, Vdd, light etc.) of the circuit. This paper shows a non-trivial polymorphic combinational circuit (5 bit majority/Boolean symmetry) which was designed at the gate level and then simulated using polymorphic NAND/NOR gates controlled by Vdd and some conventional gates at the transistor level. PSpice simulations have shown correct behavior of this circuit.
Published
2006
Pages
85-86
Proceedings
Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop
Conference
IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, Praha, CZ
ISBN
1424401844
Publisher
IEEE Computer Society
Place
Praha, CZ
BibTeX
@INPROCEEDINGS{FITPUB8033, author = "Luk\'{a}\v{s} Sekanina and Luk\'{a}\v{s} Stare\v{c}ek and Zden\v{e}k Kot\'{a}sek", title = "Novel Logic Circuits Controlled by Vdd", pages = "85--86", booktitle = "Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop", year = 2006, location = "Praha, CZ", publisher = "IEEE Computer Society", ISBN = "1424401844", language = "english", url = "https://www.fit.vut.cz/research/publication/8033" }