Publication Details

FITTest_BENCH06: A New Set of Benchmark Circuits Reflecting Testability Properties

PEČENKA Tomáš, KOTÁSEK Zdeněk and SEKANINA Lukáš. FITTest_BENCH06: A New Set of Benchmark Circuits Reflecting Testability Properties. In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Praha: IEEE Computer Society, 2006, pp. 285-289. ISBN 1424401844.
Czech title
FITTest_BENCH06: Nová sada testovacích obvodů zohledňující jejich testovatelnost
Type
conference paper
Language
english
Authors
Pečenka Tomáš, Ing. (DCSY FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY FIT BUT)
Keywords

benchmark, synthetic, RTL, testability

Abstract

In the paper, the FITTest_BENCH06 set of synthetic benchmark circuits is presented for the evaluation of diagnostic methods and tools. The structure of benchmark circuits together with their diagnostic properties is described. The set consists of 31 circuits at various levels of complexity (2000, 10000, 28000, 100000, 150000 and 300000 gates). Four circuits with different diagnostic properties are available for each level of circuit complexity (fault coverage is approx. 0%, 33%, 66% and 100%). The benchmark circuits are available both at the register transfer level and the gate level. In addition to the benchmark set, a method is described that was used to develop benchmark circuits with required complexity and diagnostic properties.

Published
2006
Pages
285-289
Proceedings
Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop
Conference
IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, Praha, CZ
ISBN
1424401844
Publisher
IEEE Computer Society
Place
Praha, CZ
BibTeX 
@INPROCEEDINGS{FITPUB8085,
   author = "Tom\'{a}\v{s} Pe\v{c}enka and Zden\v{e}k Kot\'{a}sek and Luk\'{a}\v{s} Sekanina",
   title = "FITTest\_BENCH06: A New Set of Benchmark Circuits Reflecting Testability Properties",
   pages = "285--289",
   booktitle = "Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop",
   year = 2006,
   location = "Praha, CZ",
   publisher = "IEEE Computer Society",
   ISBN = "1424401844",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/8085"
}
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