Publication Details

FPGA Components in Simulink

ČERNÝ Stanislav, STRUŽKA Petr, KOŘENEK Jan, MARTÍNEK Tomáš and KOTÁSEK Zdeněk. FPGA Components in Simulink. In: Proceedings of XXVIIIth International Autumn Colloquium ASIS 2006. Ostrava, 2006, pp. 158-163. ISBN 80-86840-26-3.
Czech title
FPGA komponenty v prostředí Simulinku
Type
conference paper
Language
english
Authors
Černý Stanislav, Ing. (UNIS)
Stružka Petr, Ing. (UNIS)
Kořenek Jan, doc. Ing., Ph.D. (DCSY FIT BUT)
Martínek Tomáš, doc. Ing., Ph.D. (DCSY FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Keywords

VHDL, FPGA, code generation, Simulink, modeling, Processor Expert

Abstract

The paper gives a brief view on possibilities how to exploit modeling features of Simulink interconnected with Processor Expert to finalize code of VHDL components placed in FPGA. Such an FPGA can be used to deliver powerful co-processing unit where main processing unit (e.g. microcontroller) is not powerful enough and/or the task to be solved is somehow special.

Published
2006
Pages
158-163
Proceedings
Proceedings of XXVIIIth International Autumn Colloquium ASIS 2006
Conference
28th International Autumn Colloquium Advanced Simulation of Systems - ASIS 2006, Vranov (u Brna), CZ
ISBN
80-86840-26-3
Place
Ostrava, CZ
BibTeX 
@INPROCEEDINGS{FITPUB8167,
   author = "Stanislav \v{C}ern\'{y} and Petr Stru\v{z}ka and Jan Ko\v{r}enek and Tom\'{a}\v{s} Mart\'{i}nek and Zden\v{e}k Kot\'{a}sek",
   title = "FPGA Components in Simulink",
   pages = "158--163",
   booktitle = "Proceedings of XXVIIIth International Autumn Colloquium ASIS 2006",
   year = 2006,
   location = "Ostrava, CZ",
   ISBN = "80-86840-26-3",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/8167"
}
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