Publication Details

Generátor hlídacích obvodů pro komunikační protokoly Xilinx FPGA

STRAKA Martin. Generátor hlídacích obvodů pro komunikační protokoly Xilinx FPGA. In: Počítačové architektury a diagnostika 2007. Plzeň: University of West Bohemia in Pilsen, 2007, pp. 129-136. ISBN 978-80-7043-605-9.
English title
Checker Generator for Comunication Protocols XILINX FPGA
Type
conference paper
Language
czech
Authors
Straka Martin, Ing., Ph.D. (DCSY FIT BUT)
Keywords

checker, comunication protocol, VHDL, FPGA

Abstract

In this paper, checker Generator for Comunication Protocols XILINX FPGA is described.

Published
2007
Pages
129-136
Proceedings
Počítačové architektury a diagnostika 2007
Conference
Počítačové architektury a diagnostika 2007, Srní, CZ
ISBN
978-80-7043-605-9
Publisher
University of West Bohemia in Pilsen
Place
Plzeň, CZ
BibTeX 
@INPROCEEDINGS{FITPUB8441,
   author = "Martin Straka",
   title = "Gener\'{a}tor hl\'{i}dac\'{i}ch obvod\r{u} pro komunika\v{c}n\'{i} protokoly Xilinx FPGA",
   pages = "129--136",
   booktitle = "Po\v{c}\'{i}ta\v{c}ov\'{e} architektury a diagnostika 2007",
   year = 2007,
   location = "Plze\v{n}, CZ",
   publisher = "University of West Bohemia in Pilsen",
   ISBN = "978-80-7043-605-9",
   language = "czech",
   url = "https://www.fit.vut.cz/research/publication/8441"
}
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