Publication Details
Transistor-level Evolution of Digital Circuits Using a Special Circuit Simulator
evolutionary design, digital circuit, transistor-level design
An evolutionary algorithm is used to design digital circuits at the transistor level. In particular, various static CMOS circuits with up to four inputs were evolved. The increase in the complexity of evolved circuits wrt existing circuits evolved at the transistor level is primarily caused by two phenomena: the usage of a specialized circuit simulator and restriction of the search space. Because we restricted the search space to the set of "reasonable designs" we could employ imperfect, but very fast circuit simulation. The usage of proposed simulator allowed exploring more candidate designs than a conventional Spice-based approach. However, in some cases, an incorrect behavior was detected after validation of evolved circuits using Spice simulator.
@INPROCEEDINGS{FITPUB8665,
author = "Lud\v{e}k \v{Z}aloudek and Luk\'{a}\v{s} Sekanina",
title = "Transistor-level Evolution of Digital Circuits Using a Special Circuit Simulator",
pages = "320--331",
booktitle = "Evolvable Systems: From Biology to Hardware",
series = "Lecture Notes in Computer Science",
volume = 5216,
year = 2008,
location = "Berlin, DE",
publisher = "Springer Verlag",
ISBN = "978-3-540-85856-0",
language = "english",
url = "https://www.fit.vut.cz/research/publication/8665"
}