Towards Automatic Design of Competitive Image Filters in FPGAs

evolutionary design, image filter, bank of filters

This paper presents a new approach to the FPGA implementation of image filters which are utilized to remove the salt and pepper noise of high intensity. An evolutionary algorithm (EA) is utilized to find a set of image filters which can be employed in a bank of image filters.

The main advantage of this approach is that the bank of evolutionary designed filters requires four times less resources on a chip in comparison with the adaptive median filter while the
visual quality of filtering is preserved. The proposed solution also exhibits a very good behavior for the impulse bursts noise.

In order to design image filters in reasonable time, an FPGA-based evolutionary platform is
utilized. The proposed platform is based on the implementation
of a search algorithm in the PowerPC processor which is available in Xilinx
Virtex II Pro and newer FPGAs.
As the search algorithm as well as the evaluation of candidate solution runs in FPGA,
the evolutionary design of image filters needs approx. 44 times less time to
design a human-competitive filter when compared to the same algorithm running on
the common PC.