Publication Details

Cycle Accurate Profiler for ASIPs

PŘIKRYL Zdeněk and HRUŠKA Tomáš. Cycle Accurate Profiler for ASIPs. In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2009, pp. 168-175. ISBN 978-80-87342-04-6.
Czech title
Profiler pro ASIP na úrovni cyklů
Type
conference paper
Language
english
Authors
Přikryl Zdeněk, Ing., Ph.D. (DIFS FIT BUT)
Hruška Tomáš, prof. Ing., CSc. (DIFS FIT BUT)
Keywords

Profiler, Simulation, Application Specific Instruction-set Processors, Formal Models

Abstract

The simulation of one processor on another is an important part of processor development because simulation is the way in witch a designer can verify and validate processor's instruction set, its micro-architecture or program, which will be executed on this processor. But a simple simulation is not sufficient in cases where the developer wants to optimize an executed program or processor's parts. For this purpose a profiler is used. The profiler is a tool tracing processor activities, so it provides the information about utilization of particular parts. In this paper a technique creating a profiler from a processor description in an architecture description language is proposed.

Published
2009
Pages
168-175
Proceedings
5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science
Conference
MEMICS'09 -- 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Znojmo, CZ
ISBN
978-80-87342-04-6
Publisher
Masaryk University
Place
Brno, CZ
BibTeX 
@INPROCEEDINGS{FITPUB9110,
   author = "Zden\v{e}k P\v{r}ikryl and Tom\'{a}\v{s} Hru\v{s}ka",
   title = "Cycle Accurate Profiler for ASIPs",
   pages = "168--175",
   booktitle = "5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science",
   year = 2009,
   location = "Brno, CZ",
   publisher = "Masaryk University",
   ISBN = "978-80-87342-04-6",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/9110"
}
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