Publication Details

Využití a akcelerace evolučních technik pro návrh číslicových obvodů

VAŠÍČEK Zdeněk. Využití a akcelerace evolučních technik pro návrh číslicových obvodů. In: Počítačové architektury a diagnostika 2010. Brno: Faculty of Information Technology BUT, 2010, pp. 165-170. ISBN 978-80-214-4140-8.
English title
The evolutionary techniques for digital circuits : acceleration and applications
Type
conference paper
Language
czech
Authors
Vašíček Zdeněk, doc. Ing., Ph.D. (DCSY FIT BUT)
Keywords

evolutionary design, digital circuits, cartessian genetic programming, acceleration, fpga

Abstract

In recent years, it has been shown that by means of evolutionary techniques we can obtain quality and sometimes innovative solutions (especially in the field of digital system design). However, evolutionary approach are seldom applicable to solve complex tasks due to the so called scalability problem, in particular the problem of scalability of evaluation. This paper describes the structure of the dissertation thesis that proposes various approaches that can reduce the scalability problem in evolutionary design.

Published
2010
Pages
165-170
Proceedings
Počítačové architektury a diagnostika 2010
Conference
Počítačové architektury a diagnostika 2010, PAD 2010, Češkovice, CZ
ISBN
978-80-214-4140-8
Publisher
Faculty of Information Technology BUT
Place
Brno, CZ
BibTeX 
@INPROCEEDINGS{FITPUB9402,
   author = "Zden\v{e}k Va\v{s}\'{i}\v{c}ek",
   title = "Vyu\v{z}it\'{i} a akcelerace evolu\v{c}n\'{i}ch technik pro n\'{a}vrh \v{c}\'{i}slicov\'{y}ch obvod\r{u}",
   pages = "165--170",
   booktitle = "Po\v{c}\'{i}ta\v{c}ov\'{e} architektury a diagnostika 2010",
   year = 2010,
   location = "Brno, CZ",
   publisher = "Faculty of Information Technology BUT",
   ISBN = "978-80-214-4140-8",
   language = "czech",
   url = "https://www.fit.vut.cz/research/publication/9402"
}
Back to top