Publication Details
Evolutionary hardware design (Invited Paper)
evolvable hardware, genetic programming, field programmable gate array, logic design, image filter
Since the early 1990's researchers have begun to apply evolutionary algorithms to synthesize electronic circuits. Nowadays it is evident that the evolutionary design approach can automatically create efficient electronic circuits in many domains. This paper surveys fundamental concepts of evolutionary hardware design. It introduces relevant search algorithms such as Cartesian genetic programming (CGP). Several case studies are presented demonstrating strength and weakness of the method. Target domains are combinational circuit synthesis where the goal is to minimize the number of gates, image filter design intended for field programmable gate arrays (FPGAs) where the goal is to obtain the quality of filtering of conventional methods for a significantly lower cost on a chip and evolution of benchmark circuits for evaluation of testability analysis methods. Evolved circuits are compared with the best-known conventional designs. FPGAs are presented as accelerators for evolutionary circuit design and circuit adaptation.
@INPROCEEDINGS{FITPUB9660,
author = "Luk\'{a}\v{s} Sekanina",
title = "Evolutionary hardware design (Invited Paper)",
pages = "1--11",
booktitle = "VLSI Circuits and Systems V",
series = "Proc. of SPIE Vol. 8067",
year = 2011,
location = "Bellingham, US",
publisher = "SPIE - the international society for optics and photonics",
ISBN = "978-0-8194-8656-1",
language = "english",
url = "https://www.fit.vut.cz/research/publication/9660"
}