Detail publikace

Online Protocol Testing for FPGA Based Fault Tolerant Systems

TOBOLA, J.; KOTÁSEK, Z.; KOŘENEK, J.; MARTÍNEK, T.; STRAKA, M. Online Protocol Testing for FPGA Based Fault Tolerant Systems. 10th EUROMICRO Conference on Digital System Design DSD 2007. Lubeck, Germany: IEEE Computer Society, 2007. p. 676-679. ISBN: 0-7695-2978-X.
Název česky
Online Protocol Testing for FPGA Based Fault Tolerant Systems
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Tobola Jiří, Ing., MBA (PR FIT)
Kotásek Zdeněk, doc. Ing., CSc.
Kořenek Jan, doc. Ing., Ph.D. (UPSY)
Martínek Tomáš, doc. Ing., Ph.D. (UPSY)
Straka Martin, Ing., Ph.D.
Klíčová slova

Communication Protocol Testing, Fault Tolerant Systems, Checker, FPGA, VHDL

Abstrakt

In this paper, the methodology for automated design of checker for
communication protocol testing is presented. Based on the level of
checking, different design strategies can be performed - in the
paper the lowest level is presented. The definition of dedicated
language for the description of possible communication faults is
presented. The core generator is used to produce VHDL code
describing the behaviour of the checker.

Rok
2007
Strany
676–679
Sborník
10th EUROMICRO Conference on Digital System Design DSD 2007
Konference
Desátá Euromicro konference o návrhu číslicových systémů, Lübeck, DE
ISBN
0-7695-2978-X
Vydavatel
IEEE Computer Society
Místo
Lubeck, Germany
BibTeX
@inproceedings{BUT28607,
  author="Jiří {Tobola} and Zdeněk {Kotásek} and Jan {Kořenek} and Tomáš {Martínek} and Martin {Straka}",
  title="Online Protocol Testing for FPGA Based Fault Tolerant Systems",
  booktitle="10th EUROMICRO Conference on Digital System Design DSD 2007",
  year="2007",
  pages="676--679",
  publisher="IEEE Computer Society",
  address="Lubeck, Germany",
  isbn="0-7695-2978-X",
  url="https://www.fit.vut.cz/research/publication/8349/"
}
Soubory
Nahoru