Course details
Design of Computer Systems
INP Acad. year 2024/2025 Winter semester 6 credits
Processor operating principle. Von Neumann computer. Data types, formats, and coding. Instructions, formats, coding and addressing, instruction set architecture. VHDL models of algorithms and subsystems. Instruction pipelining. Arithmetic and logic operations in fixed and floating-point number representation. Controllers: basic function, hard-wired and microprogram implementation. Memories: types, organization, control. Memory hierarchy, cache memory. Peripheral units, buses and bus control. Performance evaluation. Reliability of computer systems. Introduction to parallel architectures.
Guarantor
Course coordinator
Language of instruction
Completion
Time span
- 39 hrs lectures
- 12 hrs seminar
- 14 hrs projects
Assessment points
- 52 pts final exam (written part)
- 15 pts mid-term test (written part)
- 33 pts projects
Department
Lecturer
Instructor
Mrázek Vojtěch, Ing., Ph.D. (DCSY)
Vašíček Zdeněk, doc. Ing., Ph.D. (DCSY)
Learning objectives
To give the students knowledge of organization and functioning of a (single core) processor, in particular, the principles of the operation, memory and control units, the algorithms with fixed and floating point number systems, the subsystem communication level, and integration of the processor to a parallel system.
After completing this course, students will be able to describe the functionality of the computation, memory and control units, and their communication in a digital computer. They will be familiar with the basics of VHDL. They will understand the development trends and limitations of computer technology.
Recommended prerequisites
- Machine Level Programming (ISU)
- Digital Systems Design (INC)
Fundamental literature
- Hamacher, C., Vranesic, Z., Zaky, S., N. Manjikian: Computer Organization and Embedded Systems, 6th edition, McGraw Hill, 2012, ISBN-13: 978-0-07-338065-0
- Hennessy J. L., Patterson D. A.: Computer Architecture: A Quantitative Approach, 2nd edition, Morgan Kaufmann Publ., 1996, and new editions, e.g. the 5th ed. from 2012.
Syllabus of lectures
- Introduction, processor and its organization.
- Instruction sets, register structures.
- Pipelining in processors.
- Data representation.
- Algorithms of fixed-point operations.
- Algorithms of floating point operations, iterative algorithms.
- Controllers.
- Memory.
- Cache memory.
- Buses, peripheral interfacing and control.
- Computer performance and performance evaluation.
- Reliability of computer systems.
- Introduction to parallel architectures.
Syllabus of seminars
- VHDL - introduction
- VHDL - synthesizable code
- FPGA
- Processor in VHDL
- Huffman code, Hamming code
- Modular arithmetic, adders
- Multipliers
- Division
- Iterative algorithms
- Performance evaluation, reliability
- Parallel Architectures
Syllabus - others, projects and individual work of students
- Two projects will be assigned during the semester.
Progress assessment
Exam prerequisites: For receiving the credit and thus for entering the exam, students have to get at least 20 points during the semester. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action can be initiated.
Within this course, attendance on the lectures and demonstrations is not monitored. The knowledge of students is examined by the projects, the mid-term exam and by the final exam. The minimal number of points which can be obtained from the final exam is 20. Otherwise, no points will be assigned to a student. In the case of a reported barrier preventing the student to perform the scheduled activity, the guarantor can allow the student to perform this activity on an alternative date.
Schedule
Day | Type | Weeks | Room | Start | End | Capacity | Lect.grp | Groups | Info |
---|---|---|---|---|---|---|---|---|---|
Mon | lecture | 1., 2., 4., 5., 6., 11. of lectures | E104 E105 E112 | 14:00 | 16:50 | 294 | 2BIB 3BIT | 20 - 29 xx | Sekanina |
Mon | lecture | 3., 8., 9., 10., 12., 13. of lectures | E104 E105 E112 | 14:00 | 16:50 | 294 | 2BIB 3BIT | 20 - 29 xx | Bidlo |
Mon | exam | 2024-11-04 | D0207 E104 | 16:00 | 17:00 | INP - půlsemestrální zkouška - pondělí | |||
Mon | exam | 2024-11-04 | E104 | 16:00 | 17:30 | INP - půlsemestrální zkouška - pondělí - prodloužené | |||
Mon | exam | 2024-11-04 | E105 E112 | 16:00 | 17:00 | INP - půlsemestrální zkouška - pondělí | |||
Mon | seminar | 1., 3., 5., 6., 8., 9., 10., 11., 12., 13. of lectures | E104 E105 E112 | 17:00 | 17:50 | 294 | 2BIB 3BIT | 20 - 29 xx | Mrázek |
Mon | seminar | 2., 4. of lectures | E104 E105 E112 | 17:00 | 17:50 | 294 | 2BIB 3BIT | 20 - 29 xx | Vašíček |
Tue | lecture | 1., 2., 4., 5., 6., 7., 11. of lectures | D0206 D105 | 16:00 | 18:50 | 470 | 2BIA 3BIT | 10 - 19 xx | Sekanina |
Tue | lecture | 3., 8., 9., 10., 12., 13. of lectures | D0206 D105 | 16:00 | 18:50 | 470 | 2BIA 3BIT | 10 - 19 xx | Bidlo |
Tue | exam | 2024-11-05 | D0206 D0207 D105 E112 G202 | 18:00 | 19:00 | INP - půlsemestrální zkouška - úterý | |||
Tue | seminar | 1., 2., 3., 5., 6., 8., 9., 10., 11., 12., 13. of lectures | D0206 D105 | 19:00 | 19:50 | 470 | 2BIA 3BIT | 10 - 19 xx | Mrázek |
Tue | seminar | 4., 7. of lectures | D0206 D105 | 19:00 | 19:50 | 470 | 2BIA 3BIT | 10 - 19 xx | Vašíček |
Course inclusion in study plans
- Programme BIT, 2nd year of study, Compulsory
- Programme BIT (in English), 2nd year of study, Compulsory