Thesis Details

Automatizované testováni v FPGA

Bachelor's Thesis Student: Valecký David Academic Year: 2020/2021 Supervisor: Hruška Tomáš, prof. Ing., CSc.
English title
Automated Testing in FPGA
Language
Czech
Abstract

The aim of this work is to analyze the testing of processors developed by Codasip and find out which of the tests should be performed using FPGA devices. Furthermore, the goal is to design and implement a system for remote operation of FPGA devices connected to a central server in order to perform tests. The system is programmed in Python using the client-server architecture and Flask framework. The interaction of the server with the FPGA devices is ensured with the help of OpenOCD. The implemented system allows a~user to find out the status of connected FPGA circuits, configure these devices and then use them to run tests. The work uses FPGAs Artix-7 series made by Xilinx, placed on Digilent Nexys A7 development boards. The resulting testing of programmed chips in an FPGA representing a microprocessor is accelerated when using an FPGA device. Its results are faster on hardware representation than on its simulation in some cases.

Keywords

testing, Python, FPGA, web application, microprocessor, processor

Department
Degree Programme
Information Technology
Files
Status
defended, grade A
Date
17 June 2021
Reviewer
Přikryl Zdeněk, Ing., Ph.D.
Committee
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY FIT BUT), předseda
Holík Lukáš, doc. Mgr., Ph.D. (DITS FIT BUT), člen
Hradiš Michal, Ing., Ph.D. (DCGM FIT BUT), člen
Jaroš Jiří, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Křivka Zbyněk, Ing., Ph.D. (DIFS FIT BUT), člen
Citation
VALECKÝ, David. Automatizované testováni v FPGA. Brno, 2021. Bachelor's Thesis. Brno University of Technology, Faculty of Information Technology. 2021-06-17. Supervised by Hruška Tomáš. Available from: https://www.fit.vut.cz/study/thesis/24135/
BibTeX
@bachelorsthesis{FITBT24135,
    author = "David Valeck\'{y}",
    type = "Bachelor's thesis",
    title = "Automatizovan\'{e} testov\'{a}ni v FPGA",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2021,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/24135/"
}
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